Addressing more comments - change \blue to \BSVfull

Author: krame505

doc/.gitignore

@@ -15,4 +15,4 @@
 *.toc
 *.fdb_latexmk
 *.fls
-*.synctex.gz
+*.synctex.gz

doc/BH_ref_guide/BH_lang.tex

@@ -119,8 +119,7 @@
 \newcommand{\BH}{BH}
 \newcommand\BHfull{Bluespec Haskell/Classic}
 
-\newcommand{\blue}{Bluespec SystemVerilog}
-\newcommand{\BSVFull}{Bluespec SystemVerilog}
+\newcommand{\BSVfull}{Bluespec SystemVerilog}
 \newcommand{\BSV}{BSV}
 \newcommand{\BSVVersion}{3.8}
 \newcommand{\BSVvN}{BSV 3.8}

doc/BSV_ref_guide/BSV_lang.tex

@@ -115,8 +115,7 @@
 
 \newcommand{\BH}{BH}
 
-\newcommand{\blue}{Bluespec SystemVerilog}
-\newcommand{\BSVFull}{Bluespec SystemVerilog}
+\newcommand{\BSVfull}{Bluespec SystemVerilog}
 \newcommand{\BSV}{BSV}
 \newcommand{\BSVVersion}{3.8}
 \newcommand{\BSVvN}{BSV 3.8}
@@ -352,7 +351,7 @@ \section{Introduction}
 
 \vspace*{3ex}
 
-{\BSV} ({\BSVFull}) is aimed at hardware designers who are using or
+{\BSV} ({\BSVfull}) is aimed at hardware designers who are using or
 expect to use Verilog {\cite{IEEEVerilog2005a}}, VHDL
 {\cite{IEEEVHDL2002}}, {\SV} {\cite{IEEESystemVerilog2012a}}, or
 SystemC {\cite{IEEESystemC2011a}} to design ASICs or FPGAs.  It is also
@@ -11009,7 +11008,7 @@ \subsubsection{Rules}
 \end{verbatim}
 The designer can ensure that the signals will exist in the Verilog
 by using an appropriate compiler flag, the \te{-keep-fires} flag which
-is documented in the {\blue} User Guide.
+is documented in the {\BSVfull} User Guide.
 
 The \te{doc} attribute can be attached to any \te{rule..endrule} expression,
 such as inside a function or inside a for-loop.

doc/libraries_ref_guide/LibDoc/BGetPut.tex

@@ -16,7 +16,7 @@ \subsubsection{BGetPut}
 \te{Get} and \te{Put}, but the interconnection of them
 (via \te{Connectable} or in {\veri}) is implemented with a simple protocol
 that allows all inputs and outputs to be directly connected.   
-All wires go to registers and have no {\blue} handshaking.
+All wires go to registers and have no {\BSVfull} handshaking.
 The protocol makes no assumptions about setup time and hold time for the
 registers at each end;  so these interfaces may be used when the two ends
 have different clocks. 

doc/libraries_ref_guide/LibDoc/Prelude.tex

@@ -6927,7 +6927,7 @@ \subsection{Generics}
 about the types, fields and constructors, such as their name, arity and index.
 Users can implement a default instance for their type class, using a helper type class over the generic representation.
 
-Due to the complexity of the types involved, writing generic instances in \blue{} can be rather tedious.
+Due to the complexity of the types involved, writing generic instances in \BSVfull{} can be rather tedious.
 Thus the documentation here is instead given using the \BHfull{} syntax.
 
 \subsubsection{The \te{Generic} type class}
@@ -7011,7 +7011,7 @@ \subsubsection{Representation types}
    \end{libverbatim}
    &
    The \te{ConcPoly} type exists as a workaround for a limitation of generics in dealing with higher-rank data types;
-   see below for more details.  Users typically should not need to define instances for \te{ConcPrim}. \\
+   see below for more details.  Users typically should not need to define instances for \te{ConcPoly}. \\
    \hline
    \begin{libverbatim}
 data Meta m r = Meta r

doc/libraries_ref_guide/LibDoc/Vector.tex

@@ -131,7 +131,7 @@ \subsubsection{Creating and Generating Vectors}
 
 The following functions are used to create new vectors, with and
 without defined elements.
-There are no {\blue} constructors available for this abstract type
+There are no {\BSVfull} constructors available for this abstract type
 (and hence no pattern-matching is available for this type)
 but the following  functions may be used to construct values of
 the \te{Vector} type.

doc/libraries_ref_guide/libraries_ref_guide.tex

@@ -100,7 +100,7 @@
 
 \newcommand{\BS}{Bluespec}
 \newcommand{\BSV}{BSV}
-\newcommand{\blue}{Bluespec SystemVerilog}
+\newcommand{\BSVfull}{Bluespec SystemVerilog}
 \newcommand{\BH}{BH}
 \newcommand\BHfull{Bluespec Haskell/Classic}
 

src/Libraries/Base1/Fork.bs

@@ -5,7 +5,7 @@ import Vector
 --@ \subsubsection{Fork}
 --@
 --@ \index{Enum@\te{Fork} (package)|textbf}
---@ The {\blue} compiler does very aggressive common subexpression
+--@ The {\BSVfull} compiler does very aggressive common subexpression
 --@ elimination (CSE).  If this has to be circumvented it has to be done
 --@ explicitly.  The \te{Fork} package provides various ways to duplicate
 --@ values to avoid CSE.

src/Libraries/Base1/ListN.bs

@@ -106,7 +106,7 @@ grabN i n bs =
 --X \begin{itemize}
 --X \item{\bf Creating and Generating ListNs}
 --X
---X There are no {\blue} constructors available for this abstract type
+--X There are no {\BSVfull} constructors available for this abstract type
 --X (and hence no pattern-matching is available for this type)
 --X but the following ordinary functions may be used to construct values of
 --X the \te{ListN} type.

src/Libraries/Base1/Vector.bs

@@ -134,7 +134,7 @@ instance (Bounded a, Bits a sa) => Bounded (Vector n a)
 --@ \begin{itemize}
 --@ \item{\bf Creating and Generating Vectors}
 --@
---@ There are no {\blue} constructors available for this abstract type
+--@ There are no {\BSVfull} constructors available for this abstract type
 --@ (and hence no pattern-matching is available for this type)
 --@ but the following ordinary functions may be used to construct values of
 --@ the \te{Vector} type.

src/Libraries/Base2/BGetPut.bs

@@ -15,7 +15,7 @@ import ClientServer
 --@ \te{Get} and \te{Put}, but the interconnection of them
 --@ (via \te{Connectable} or in {\veri}) is implemented with a simple protocol
 --@ that allows all inputs and outputs to be directly connected.
---@ Furthermore, all wires go to registers and have no {\blue} handshaking.
+--@ Furthermore, all wires go to registers and have no {\BSVfull} handshaking.
 --@ The protocol makes no assumptions about setup time and hold time for the
 --@ registers at each end; so these interfaces may be used when the two ends
 --@ have different clocks.  In all other circumstances, however, the

src/Libraries/Base2/EqFunction.bs

@@ -18,4 +18,4 @@ instance (Bits a sa, Bounded a, Eq b) => Eq (a -> b)
     (/=) f g  =  not (f == g)
 
 --@ The ability to compare functions for equality can be useful
---@ for compile time verification of properties of the {\blue} code.
+--@ for compile time verification of properties of the {\BSVfull} code.

src/Libraries/Base2/IVec.bs

@@ -11,7 +11,7 @@ import Vector
 --@ rectified, and this workaround is no longer necessary.)
 --@
 --@ The \te{IVec} package contains some definitions to work around a deficiency
---@ in the {\blue} compiler.  The compiler does not allow the type \te{Vector} in
+--@ in the {\BSVfull} compiler.  The compiler does not allow the type \te{Vector} in
 --@ interfaces for which code is generated.  To make this almost possible this
 --@ package contains types that are isomorphic to \te{Vector} of some small number
 --@ of length (0-16).  There are also conversion functions to and from \te{Vector}.