This repository contains the source code of PROLEAD, a framework for hardware security analysis. It evaluates the robust (but relaxed) probing security of masked implementations provided as Verilog netlists or ARM binaries, considering physical defaults, micro-architectural effects, and faults. For a quick start, we recommend to read the quickstart guide.
All information about the features and use of PROLEAD can be found in the Wiki.
Some selected examples can be found in the examples folder. More information regarding the examples can be found in the Wiki. We will provide more examples soon.
Please contact Nicolai Müller (nicolai.mueller@rub.de) if you have any questions, comments, if you found a bug that should be corrected, or if you want to reuse PROLEAD or parts of it for your own research projects.
