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<li><p>The <codeclass="docutils literal notranslate"><spanclass="pre">jump</span></code> instruction transfers control from a basic block to another.</p></li>
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<li><p>The <codeclass="docutils literal notranslate"><spanclass="pre">cbr</span></code> instruction is the conditional branch. It consumes the top most value from the stack,
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and if this value is true, then control is transferred to the first block, else to the second block.</p></li>
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<li><p>The <codeclass="docutils literal notranslate"><spanclass="pre">eq</span></code> instruction pops the topmost two values from the stack, and replaces them with integer value
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<codeclass="docutils literal notranslate"><spanclass="pre">1</span></code> or <codeclass="docutils literal notranslate"><spanclass="pre">0</span></code>.</p></li>
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and if this value is true (in this case, a non-zero value), then control is transferred
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to the first block, else to the second block.</p></li>
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<li><p>The <codeclass="docutils literal notranslate"><spanclass="pre">eq</span></code> instruction pops the two topmost values from the stack, compares them and pushes a result:
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<codeclass="docutils literal notranslate"><spanclass="pre">1</span></code> for true or <codeclass="docutils literal notranslate"><spanclass="pre">0</span></code> for false.</p></li>
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</ul>
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<sectionid="advantages">
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<h3>Advantages<aclass="headerlink" href="#advantages" title="Permalink to this headline">¶</a></h3>
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<ulclass="simple">
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<li><p>The IR is compact to represent in stored form as most instructions do not take have operands.
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<li><p>The IR is compact to represent in stored form as most instructions do not have operands.
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This is a reason why many languages choose to encode their compiled code in
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this form. Examples are Java, C#, Web Assembly.</p></li>
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<li><p>The IR can be executed easily by an Interpreter.</p></li>
@@ -136,6 +137,8 @@ <h3>Advantages<a class="headerlink" href="#advantages" title="Permalink to this
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<h3>Disadvantages<aclass="headerlink" href="#disadvantages" title="Permalink to this headline">¶</a></h3>
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<ulclass="simple">
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<li><p>Not easy to implement optimizations.</p></li>
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<li><p>For a reader it is hard to trace values as they flow through instructions,
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as it requires tracking them through a conceptual stack.</p></li>
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<li><p>Harder to analyze the IR, although there are methods available to do so.</p></li>
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</ul>
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</section>
@@ -168,13 +171,13 @@ <h2>Register Based IR or Three-Address IR<a class="headerlink" href="#register-b
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<p>The instructions above are as follows:</p>
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<ulclass="simple">
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<li><p><codeclass="docutils literal notranslate"><spanclass="pre">%t1</span><spanclass="pre">=</span><spanclass="pre">n+1</span></code> - is a typical three-address instruction of the form <codeclass="docutils literal notranslate"><spanclass="pre">result</span><spanclass="pre">=</span><spanclass="pre">value1</span><spanclass="pre">operator</span><spanclass="pre">value2</span></code>. The name <codeclass="docutils literal notranslate"><spanclass="pre">%t1</span></code>
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refers to a temporary, whereas <codeclass="docutils literal notranslate"><spanclass="pre">n</span></code> refers to the input argument <codeclass="docutils literal notranslate"><spanclass="pre">n</span></code>.</p></li>
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refers to a temporary, whereas <codeclass="docutils literal notranslate"><spanclass="pre">n</span></code> refers to the input argument <codeclass="docutils literal notranslate"><spanclass="pre">n</span></code>. Both of these names are virtual registers.</p></li>
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<li><p><codeclass="docutils literal notranslate"><spanclass="pre">ret</span><spanclass="pre">%t1</span></code> - is the return instruction, in this instance it references the temporary.</p></li>
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</ul>
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<p>The virtual registers in the IR are so called because they do not map to real registers in the target physical machine.
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Instead these are just named slots in the abstract machine responsible for executing the IR. Typically, the abstract machine
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will assign each virtual register a unique location in its stack frame. So we still end up using the function’s
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stack frame, but the IR references locations within the stack frame via these virtual names, rather than implicitly
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stack frame, but the IR references locations within the stack frame directly using these virtual names, rather than implicitly
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through push and pop instructions. During optimization some of the virtual registers will end up in real hardware registers.</p>
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<p>Control flow is represented the same way as for the stack IR. Revisiting the same source example from above, we get following
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IR:</p>
@@ -198,6 +201,7 @@ <h3>Advantages<a class="headerlink" href="#id1" title="Permalink to this headlin
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<ulclass="simple">
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<li><p>Readability: the flow of values is easier to trace, whereas with a stack IR you need to conceptualize a stack somewhere,
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and track values being pushed and popped.</p></li>
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<li><p>Fewer instructions are needed compared to stack IR.</p></li>
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<li><p>The IR can be executed easily by an Interpreter.</p></li>
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<li><p>Most optimization algorithms can be applied to this form of IR.</p></li>
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<li><p>The IR can represent Static Single Assignment (SSA) in a natural way.</p></li>
@@ -223,14 +227,14 @@ <h3>Examples<a class="headerlink" href="#id3" title="Permalink to this headline"
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<sectionid="sea-of-nodes-ir">
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<h2>Sea of Nodes IR<aclass="headerlink" href="#sea-of-nodes-ir" title="Permalink to this headline">¶</a></h2>
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<p>The final example we will look at is known as the Sea of Nodes IR.</p>
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<p>It is quite different from the IRs we described above.</p>
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<p>This IR is quite different from the IRs we described above.</p>
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<p>The key features of this IR are:</p>
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<ulclass="simple">
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<li><p>Instructions are NOT organized into Basic Blocks - instead, intructions form a graph, where
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each instruction has as its inputs the definitions it uses.</p></li>
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<li><p>Instructions that produce data values are not directly bound to a Basic Block, instead they “float” around,
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the order being defined purely in terms of the dependencies between the instructions.</p></li>
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<li><p>Control flow is also represented in the same way, and control flows between control flow
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<li><p>Control flow is represented in a similar way, and control flows between control flow
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instructions. Dependencies between data instructions and control intructions occur at few well
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defined places.</p></li>
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<li><p>The IR as described above cannot be readily executed, because to execute the IR, the instructions
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