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formatting: Fix uncrustify findings
Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
1 parent f2cdc15 commit 5fc248c

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‎portable/ARMv8M/non_secure/port.c

Lines changed: 68 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -169,79 +169,80 @@ typedef void ( * portISR_t )( void );
169169
/**
170170
* @brief Constants required to manipulate the MPU.
171171
*/
172-
#define portMPU_TYPE_REG ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
173-
#define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
174-
#define portMPU_RNR_REG ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
172+
#define portMPU_TYPE_REG ( *( ( volatile uint32_t * ) 0xe000ed90 ) )
173+
#define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) )
174+
#define portMPU_RNR_REG ( *( ( volatile uint32_t * ) 0xe000ed98 ) )
175175

176-
#define portMPU_RBAR_REG ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
177-
#define portMPU_RLAR_REG ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
176+
#define portMPU_RBAR_REG ( *( ( volatile uint32_t * ) 0xe000ed9c ) )
177+
#define portMPU_RLAR_REG ( *( ( volatile uint32_t * ) 0xe000eda0 ) )
178178

179-
#define portMPU_RBAR_A1_REG ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
180-
#define portMPU_RLAR_A1_REG ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
179+
#define portMPU_RBAR_A1_REG ( *( ( volatile uint32_t * ) 0xe000eda4 ) )
180+
#define portMPU_RLAR_A1_REG ( *( ( volatile uint32_t * ) 0xe000eda8 ) )
181181

182-
#define portMPU_RBAR_A2_REG ( *( ( volatile uint32_t * ) 0xe000edac ) )
183-
#define portMPU_RLAR_A2_REG ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
182+
#define portMPU_RBAR_A2_REG ( *( ( volatile uint32_t * ) 0xe000edac ) )
183+
#define portMPU_RLAR_A2_REG ( *( ( volatile uint32_t * ) 0xe000edb0 ) )
184184

185-
#define portMPU_RBAR_A3_REG ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
186-
#define portMPU_RLAR_A3_REG ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
185+
#define portMPU_RBAR_A3_REG ( *( ( volatile uint32_t * ) 0xe000edb4 ) )
186+
#define portMPU_RLAR_A3_REG ( *( ( volatile uint32_t * ) 0xe000edb8 ) )
187187

188-
#define portMPU_MAIR0_REG ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
189-
#define portMPU_MAIR1_REG ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
188+
#define portMPU_MAIR0_REG ( *( ( volatile uint32_t * ) 0xe000edc0 ) )
189+
#define portMPU_MAIR1_REG ( *( ( volatile uint32_t * ) 0xe000edc4 ) )
190190

191-
#define portMPU_RBAR_ADDRESS_MASK ( 0xffffffe0 ) /* Must be 32-byte aligned. */
192-
#define portMPU_RLAR_ADDRESS_MASK ( 0xffffffe0 ) /* Must be 32-byte aligned. */
191+
#define portMPU_RBAR_ADDRESS_MASK ( 0xffffffe0 ) /* Must be 32-byte aligned. */
192+
#define portMPU_RLAR_ADDRESS_MASK ( 0xffffffe0 ) /* Must be 32-byte aligned. */
193193

194-
#define portMPU_RBAR_ACCESS_PERMISSIONS_MASK ( 3UL << 1UL )
194+
#define portMPU_RBAR_ACCESS_PERMISSIONS_MASK ( 3UL << 1UL )
195195

196-
#define portMPU_MAIR_ATTR0_POS ( 0UL )
197-
#define portMPU_MAIR_ATTR0_MASK ( 0x000000ff )
196+
#define portMPU_MAIR_ATTR0_POS ( 0UL )
197+
#define portMPU_MAIR_ATTR0_MASK ( 0x000000ff )
198198

199-
#define portMPU_MAIR_ATTR1_POS ( 8UL )
200-
#define portMPU_MAIR_ATTR1_MASK ( 0x0000ff00 )
199+
#define portMPU_MAIR_ATTR1_POS ( 8UL )
200+
#define portMPU_MAIR_ATTR1_MASK ( 0x0000ff00 )
201201

202-
#define portMPU_MAIR_ATTR2_POS ( 16UL )
203-
#define portMPU_MAIR_ATTR2_MASK ( 0x00ff0000 )
202+
#define portMPU_MAIR_ATTR2_POS ( 16UL )
203+
#define portMPU_MAIR_ATTR2_MASK ( 0x00ff0000 )
204204

205-
#define portMPU_MAIR_ATTR3_POS ( 24UL )
206-
#define portMPU_MAIR_ATTR3_MASK ( 0xff000000 )
205+
#define portMPU_MAIR_ATTR3_POS ( 24UL )
206+
#define portMPU_MAIR_ATTR3_MASK ( 0xff000000 )
207207

208-
#define portMPU_MAIR_ATTR4_POS ( 0UL )
209-
#define portMPU_MAIR_ATTR4_MASK ( 0x000000ff )
208+
#define portMPU_MAIR_ATTR4_POS ( 0UL )
209+
#define portMPU_MAIR_ATTR4_MASK ( 0x000000ff )
210210

211-
#define portMPU_MAIR_ATTR5_POS ( 8UL )
212-
#define portMPU_MAIR_ATTR5_MASK ( 0x0000ff00 )
211+
#define portMPU_MAIR_ATTR5_POS ( 8UL )
212+
#define portMPU_MAIR_ATTR5_MASK ( 0x0000ff00 )
213213

214-
#define portMPU_MAIR_ATTR6_POS ( 16UL )
215-
#define portMPU_MAIR_ATTR6_MASK ( 0x00ff0000 )
214+
#define portMPU_MAIR_ATTR6_POS ( 16UL )
215+
#define portMPU_MAIR_ATTR6_MASK ( 0x00ff0000 )
216216

217-
#define portMPU_MAIR_ATTR7_POS ( 24UL )
218-
#define portMPU_MAIR_ATTR7_MASK ( 0xff000000 )
217+
#define portMPU_MAIR_ATTR7_POS ( 24UL )
218+
#define portMPU_MAIR_ATTR7_MASK ( 0xff000000 )
219219

220-
#define portMPU_RLAR_ATTR_INDEX0 ( 0UL << 1UL )
221-
#define portMPU_RLAR_ATTR_INDEX1 ( 1UL << 1UL )
222-
#define portMPU_RLAR_ATTR_INDEX2 ( 2UL << 1UL )
223-
#define portMPU_RLAR_ATTR_INDEX3 ( 3UL << 1UL )
224-
#define portMPU_RLAR_ATTR_INDEX4 ( 4UL << 1UL )
225-
#define portMPU_RLAR_ATTR_INDEX5 ( 5UL << 1UL )
226-
#define portMPU_RLAR_ATTR_INDEX6 ( 6UL << 1UL )
227-
#define portMPU_RLAR_ATTR_INDEX7 ( 7UL << 1UL )
220+
#define portMPU_RLAR_ATTR_INDEX0 ( 0UL << 1UL )
221+
#define portMPU_RLAR_ATTR_INDEX1 ( 1UL << 1UL )
222+
#define portMPU_RLAR_ATTR_INDEX2 ( 2UL << 1UL )
223+
#define portMPU_RLAR_ATTR_INDEX3 ( 3UL << 1UL )
224+
#define portMPU_RLAR_ATTR_INDEX4 ( 4UL << 1UL )
225+
#define portMPU_RLAR_ATTR_INDEX5 ( 5UL << 1UL )
226+
#define portMPU_RLAR_ATTR_INDEX6 ( 6UL << 1UL )
227+
#define portMPU_RLAR_ATTR_INDEX7 ( 7UL << 1UL )
228228

229-
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
229+
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
230230

231231
#if ( portARMV8M_MINOR_VERSION >= 1 )
232-
/* Enable Privileged eXecute Never MPU attribute for the selected memory
233-
* region. */
234-
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
232+
233+
/* Enable Privileged eXecute Never MPU attribute for the selected memory
234+
* region. */
235+
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
235236
#endif /* portARMV8M_MINOR_VERSION >= 1 */
236237

237238
/* Enable privileged access to unmapped region. */
238-
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
239+
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
239240

240241
/* Enable MPU. */
241-
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
242+
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
242243

243244
/* Expected value of the portMPU_TYPE register. */
244-
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
245+
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
245246

246247
/* Extract first address of the MPU region as encoded in the
247248
* RBAR (Region Base Address Register) value. */
@@ -380,14 +381,14 @@ typedef void ( * portISR_t )( void );
380381
/**
381382
* @brief Constants required to check and configure PACBTI security feature implementation.
382383
*/
383-
#if( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
384+
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
384385

385-
#define portID_ISAR5_REG ( *( ( volatile uint32_t * ) 0xe000ed74 ) )
386+
#define portID_ISAR5_REG ( *( ( volatile uint32_t * ) 0xe000ed74 ) )
386387

387-
#define portCONTROL_UPAC_EN ( 1UL << 7UL )
388-
#define portCONTROL_PAC_EN ( 1UL << 6UL )
389-
#define portCONTROL_UBTI_EN ( 1UL << 5UL )
390-
#define portCONTROL_BTI_EN ( 1UL << 4UL )
388+
#define portCONTROL_UPAC_EN ( 1UL << 7UL )
389+
#define portCONTROL_PAC_EN ( 1UL << 6UL )
390+
#define portCONTROL_UBTI_EN ( 1UL << 5UL )
391+
#define portCONTROL_BTI_EN ( 1UL << 4UL )
391392

392393
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
393394
/*-----------------------------------------------------------*/
@@ -427,7 +428,7 @@ static void prvTaskExitError( void );
427428
static void prvSetupFPU( void ) PRIVILEGED_FUNCTION;
428429
#endif /* configENABLE_FPU */
429430

430-
#if( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
431+
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
431432

432433
/**
433434
* @brief Configures PACBTI features.
@@ -1212,6 +1213,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
12121213
uint32_t ulStackFrameSize, ulSystemCallLocation, i;
12131214

12141215
#if defined( __ARMCC_VERSION )
1216+
12151217
/* Declaration when these variable are defined in code instead of being
12161218
* exported from linker scripts. */
12171219
extern uint32_t * __syscalls_flash_start__;
@@ -1282,6 +1284,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
12821284
* point (i.e. the caller of the MPU_<API>). We need to restore it
12831285
* when we exit from the system call. */
12841286
pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ];
1287+
12851288
/* Store the value of the PSPLIM register before the SVC was raised.
12861289
* We need to restore it when we exit from the system call. */
12871290
#if ( portUSE_PSPLIM_REGISTER == 1 )
@@ -1300,6 +1303,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
13001303

13011304
/* Start executing the system call upon returning from this handler. */
13021305
pulSystemCallStack[ portOFFSET_TO_PC ] = uxSystemCallImplementations[ ucSystemCallNumber ];
1306+
13031307
/* Raise a request to exit from the system call upon finishing the
13041308
* system call. */
13051309
pulSystemCallStack[ portOFFSET_TO_LR ] = ( uint32_t ) vRequestSystemCallExit;
@@ -1359,6 +1363,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
13591363
uint32_t ulStackFrameSize, ulSystemCallLocation, i;
13601364

13611365
#if defined( __ARMCC_VERSION )
1366+
13621367
/* Declaration when these variable are defined in code instead of being
13631368
* exported from linker scripts. */
13641369
extern uint32_t * __privileged_functions_start__;
@@ -1541,7 +1546,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
15411546
xMPUSettings->ulContext[ ulIndex ] = ( uint32_t ) pxEndOfStack; /* PSPLIM. */
15421547
ulIndex++;
15431548

1544-
#if( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
1549+
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
15451550
{
15461551
/* Check PACBTI security feature configuration before pushing the
15471552
* CONTROL register's value on task's TCB. */
@@ -1814,11 +1819,11 @@ BaseType_t xPortStartScheduler( void ) /* PRIVILEGED_FUNCTION */
18141819
portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
18151820
portNVIC_SHPR2_REG = 0;
18161821

1817-
#if( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
1822+
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
18181823
{
18191824
/* Set the CONTROL register value based on PACBTI security feature
18201825
* configuration before starting the first task. */
1821-
( void) prvConfigurePACBTI( pdTRUE );
1826+
( void ) prvConfigurePACBTI( pdTRUE );
18221827
}
18231828
#endif /* configENABLE_PAC == 1 || configENABLE_BTI == 1 */
18241829

@@ -2018,9 +2023,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
20182023
if( xSchedulerRunning == pdFALSE )
20192024
{
20202025
/* Grant access to all the kernel objects before the scheduler
2021-
* is started. It is necessary because there is no task running
2022-
* yet and therefore, we cannot use the permissions of any
2023-
* task. */
2026+
* is started. It is necessary because there is no task running
2027+
* yet and therefore, we cannot use the permissions of any
2028+
* task. */
20242029
xAccessGranted = pdTRUE;
20252030
}
20262031
else if( ( xTaskMpuSettings->ulTaskFlags & portTASK_IS_PRIVILEGED_FLAG ) == portTASK_IS_PRIVILEGED_FLAG )
@@ -2241,7 +2246,7 @@ BaseType_t xPortIsInsideInterrupt( void )
22412246
#endif /* #if ( ( configENABLE_MPU == 1 ) && ( configUSE_MPU_WRAPPERS_V1 == 0 ) ) */
22422247
/*-----------------------------------------------------------*/
22432248

2244-
#if( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
2249+
#if ( ( configENABLE_PAC == 1 ) || ( configENABLE_BTI == 1 ) )
22452250

22462251
static uint32_t prvConfigurePACBTI( BaseType_t xWriteControlRegister )
22472252
{
@@ -2253,13 +2258,13 @@ BaseType_t xPortIsInsideInterrupt( void )
22532258
/* Enable UsageFault exception. */
22542259
portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_USG_FAULT_ENABLE_BIT;
22552260

2256-
#if( configENABLE_PAC == 1 )
2261+
#if ( configENABLE_PAC == 1 )
22572262
{
22582263
ulControl |= ( portCONTROL_UPAC_EN | portCONTROL_PAC_EN );
22592264
}
22602265
#endif
22612266

2262-
#if( configENABLE_BTI == 1 )
2267+
#if ( configENABLE_BTI == 1 )
22632268
{
22642269
ulControl |= ( portCONTROL_UBTI_EN | portCONTROL_BTI_EN );
22652270
}

‎portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portmacro.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@
6464

6565
#ifndef configENABLE_MVE
6666
#define configENABLE_MVE 0
67-
#elif( configENABLE_MVE != 0 )
67+
#elif ( configENABLE_MVE != 0 )
6868
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
6969
#endif
7070
/*-----------------------------------------------------------*/

‎portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portmacro.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@
6464

6565
#ifndef configENABLE_MVE
6666
#define configENABLE_MVE 0
67-
#elif( configENABLE_MVE != 0 )
67+
#elif ( configENABLE_MVE != 0 )
6868
#error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M23.
6969
#endif
7070
/*-----------------------------------------------------------*/

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