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virtual.c
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#undef NDEBUG
#include <assert.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "config.h"
#include "dill.h"
#ifdef _MSC_VER
#include <BaseTsd.h>
typedef SSIZE_T ssize_t;
#else
#include <unistd.h>
#endif
#include "dill_internal.h"
#include "virtual.h"
extern char* arith3_name[];
extern char* arith2_name[];
extern char* dill_type_names[];
extern char* branch_op_names[];
extern char* compare_op_names[];
typedef void (*apply_func)(dill_stream c,
basic_block b,
virtual_insn* ip,
int loc);
static void
apply_to_each(dill_stream c,
void* insns,
virtual_mach_info vmi,
apply_func func);
static const char* prefix_names[] = {"X86_CS_PREFIX", "X86_SS_PREFIX",
"X86_DS_PREFIX", "X86_ES_PREFIX",
"X86_FS_PREFIX", "X86_GS_PREFIX"};
#define OPND(x) \
((x >= 100) ? ((dill_type_of(c, x) == DILL_B) ? 'B' : 'R') : 'P'), x
extern int
virtual_print_insn(dill_stream c, void* info_ptr, void* i)
{
virtual_insn* insn = (virtual_insn*)i;
int insn_code = insn->insn_code;
switch (insn->class_code) {
case iclass_arith3:
printf("%s %c%d, %c%d, %c%d", arith3_name[insn_code],
OPND(insn->opnds.a3.dest), OPND(insn->opnds.a3.src1),
OPND(insn->opnds.a3.src2));
break;
case iclass_arith3i:
printf("%si %c%d, %c%d, %zu", arith3_name[insn_code],
OPND(insn->opnds.a3i.dest), OPND(insn->opnds.a3i.src),
insn->opnds.a3i.u.imm);
break;
case iclass_arith2:
printf("%s %c%d, %c%d", arith2_name[insn_code],
OPND(insn->opnds.a2.dest), OPND(insn->opnds.a2.src));
break;
case iclass_convert: {
int from_index = (insn->insn_code >> 4) & 0xf;
int to_index = insn->insn_code & 0xf;
printf("cv%s2%s %c%d, %c%d", dill_type_names[from_index],
dill_type_names[to_index], OPND(insn->opnds.a2.dest),
OPND(insn->opnds.a2.src));
break;
}
case iclass_loadstore: {
int typ = insn->insn_code & 0xf;
int store = (insn->insn_code & 0x10) == 0x10;
int bswap = (insn->insn_code & 0x20) == 0x20;
printf("%s%s%s %c%d, %c%d, %c%d", bswap ? "bs" : "",
store == 0 ? "ld" : "st", dill_type_names[typ],
OPND(insn->opnds.a3.dest), OPND(insn->opnds.a3.src1),
OPND(insn->opnds.a3.src2));
break;
}
case iclass_loadstorei: {
int typ = insn->insn_code & 0xf;
int store = (insn->insn_code & 0x10) == 0x10;
int bswap = (insn->insn_code & 0x20) == 0x20;
printf("%s%s%si %c%d, %c%d, %zu", bswap ? "bs" : "",
store == 0 ? "ld" : "st", dill_type_names[typ],
OPND(insn->opnds.a3i.dest), OPND(insn->opnds.a3i.src),
insn->opnds.a3i.u.imm);
break;
}
case iclass_lea: {
printf("lea %c%d, %c%d, %zx", OPND(insn->opnds.a3i.dest),
OPND(insn->opnds.a3i.src), insn->opnds.a3i.u.imm);
break;
}
case iclass_set: {
int typ = insn->insn_code & 0xf;
printf("set%s %c%d, %zx", dill_type_names[typ],
OPND(insn->opnds.a3i.dest), insn->opnds.a3i.u.imm);
break;
}
case iclass_setf: {
int typ = insn->insn_code & 0xf;
union {
double imm;
int imm_i[2];
} u;
u.imm = insn->opnds.sf.imm;
printf("set%s %c%d, %g 0x(%x)0x(%x)", dill_type_names[typ],
OPND(insn->opnds.sf.dest), insn->opnds.sf.imm, u.imm_i[0],
u.imm_i[1]);
break;
}
case iclass_mov: {
int typ = insn->insn_code & 0xf;
printf("mov%s %c%d, %c%d", dill_type_names[typ],
OPND(insn->opnds.a2.dest), OPND(insn->opnds.a2.src));
break;
}
case iclass_reti: {
int typ = insn->insn_code & 0xf;
printf("ret%si %zu", dill_type_names[typ], insn->opnds.a3i.u.imm);
break;
}
case iclass_ret: {
int typ = insn->insn_code & 0xf;
printf("ret%s %c%d", dill_type_names[typ], OPND(insn->opnds.a1.src));
break;
}
case iclass_branch: {
int br_op = insn->insn_code;
struct branch_table* t = &c->p->branch_table;
printf("b%s %c%d, %c%d, L%d", branch_op_names[br_op],
OPND(insn->opnds.br.src1), OPND(insn->opnds.br.src2),
insn->opnds.br.label);
if (t->label_name[insn->opnds.br.label] != NULL) {
printf("<%s>", t->label_name[insn->opnds.br.label]);
}
break;
}
case iclass_compare: {
int c_op = insn->insn_code;
printf("%s %c%d, %c%d, %c%d", compare_op_names[c_op],
OPND(insn->opnds.a3.dest), OPND(insn->opnds.a3.src1),
OPND(insn->opnds.a3.src2));
break;
}
case iclass_branchi: {
int br_op = insn->insn_code;
struct branch_table* t = &c->p->branch_table;
printf("b%si %c%d, %p, L%d", branch_op_names[br_op],
OPND(insn->opnds.bri.src), (void*)insn->opnds.bri.imm_l,
insn->opnds.bri.label);
if (t->label_name[insn->opnds.bri.label] != NULL) {
printf("<%s>", t->label_name[insn->opnds.bri.label]);
}
break;
}
case iclass_jump_to_label: {
struct branch_table* t = &c->p->branch_table;
printf("br L%d", insn->opnds.br.label);
if (t->label_name[insn->opnds.br.label] != NULL) {
printf("<%s>", t->label_name[insn->opnds.br.label]);
}
break;
}
case iclass_mark_label: {
struct branch_table* t = &c->p->branch_table;
printf("L%d:", insn->opnds.label.label);
if (t->label_name[insn->opnds.label.label] != NULL) {
printf("<%s>", t->label_name[insn->opnds.label.label]);
}
break;
}
case iclass_jump_to_reg: {
printf("jmp %c%d", OPND(insn->opnds.br.src1));
break;
}
case iclass_jump_to_imm: {
printf("jmp 0x%p", insn->opnds.bri.imm_a);
break;
}
case iclass_special: {
switch (insn->opnds.spec.type) {
case DILL_NOP:
printf("special NOP");
break;
case DILL_SEGMENTED_FOLLOWS:
printf("special SEGMENTED %s",
prefix_names[insn->opnds.spec.param]);
break;
}
break;
}
case iclass_call: {
int typ = insn->insn_code & 0xf;
int reg = insn->insn_code & 0x10;
if (typ != DILL_V) {
if (reg != 0) {
printf("call%s R%p, %c%d", dill_type_names[typ],
(void*)insn->opnds.calli.imm_l,
OPND(insn->opnds.calli.src));
} else {
const char* call_name = insn->opnds.calli.xfer_name;
if (call_name) {
printf("call%s 0x%p<%s>, %c%d", dill_type_names[typ],
insn->opnds.calli.imm_a, call_name,
OPND(insn->opnds.calli.src));
} else {
printf("call%s 0x%p, %c%d", dill_type_names[typ],
insn->opnds.calli.imm_a,
OPND(insn->opnds.calli.src));
}
}
} else {
if (reg != 0) {
printf("call%s R%p", dill_type_names[typ],
(void*)insn->opnds.calli.imm_l);
} else {
const char* call_name = insn->opnds.calli.xfer_name;
if (call_name) {
printf("call%s 0x%p<%s>", dill_type_names[typ],
insn->opnds.calli.imm_a, call_name);
} else {
printf("call%s 0x%p", dill_type_names[typ],
insn->opnds.calli.imm_a);
}
}
}
break;
}
case iclass_push: {
int typ = insn->insn_code & 0xf;
if ((short)insn->opnds.a1.src < 0) {
if ((short)insn->opnds.a1.src == -1) {
printf("pushinit");
} else {
int non_var_arg = -((short)insn->opnds.a1.src) - 2;
printf("pushinit varidiac, %d nonvar args", non_var_arg);
}
} else {
printf("push%s %c%d", dill_type_names[typ],
OPND(insn->opnds.a1.src));
}
break;
}
case iclass_pushi: {
int typ = insn->insn_code & 0xf;
if (typ == DILL_P) {
printf("push%si 0x%p", dill_type_names[typ],
insn->opnds.a3i.u.imm_a);
} else {
printf("push%si 0x%zx", dill_type_names[typ],
insn->opnds.a3i.u.imm);
}
break;
}
case iclass_pushf: {
int typ = insn->insn_code;
printf("push%si %g", dill_type_names[typ], insn->opnds.sf.imm);
break;
}
case iclass_nop:
printf("nop");
}
return sizeof(*insn);
}
static int
insn_same_except_dest(virtual_insn* i, virtual_insn* j)
{
int icode = i->insn_code;
int jcode = j->insn_code;
if (i->class_code != j->class_code)
return 0;
switch (i->class_code) {
case iclass_arith3:
case iclass_compare:
return ((icode == jcode) && (i->opnds.a3.src1 == j->opnds.a3.src1) &&
(i->opnds.a3.src2 == j->opnds.a3.src2));
case iclass_arith3i:
return ((icode == jcode) && (i->opnds.a3i.src == j->opnds.a3i.src) &&
(i->opnds.a3i.u.imm == j->opnds.a3i.u.imm));
case iclass_arith2:
return ((icode == jcode) && (i->opnds.a2.src == j->opnds.a2.src));
case iclass_convert:
return ((icode == jcode) && (i->opnds.a2.src == j->opnds.a2.src));
case iclass_loadstore:
return ((icode == jcode) && (i->opnds.a3.src1 == j->opnds.a3.src1) &&
(i->opnds.a3.src2 == j->opnds.a3.src2));
case iclass_loadstorei:
return ((icode == jcode) && (i->opnds.a3i.src == j->opnds.a3i.src) &&
(i->opnds.a3i.u.imm == j->opnds.a3i.u.imm));
case iclass_lea:
return ((i->opnds.a3i.src == j->opnds.a3i.src) &&
(i->opnds.a3i.u.imm == j->opnds.a3i.u.imm));
case iclass_set:
case iclass_setf:
return 0;
case iclass_mov:
return ((icode == jcode) && (i->opnds.a2.src == j->opnds.a2.src));
case iclass_reti:
case iclass_ret:
case iclass_branch:
case iclass_branchi:
case iclass_jump_to_label:
case iclass_jump_to_reg:
case iclass_jump_to_imm:
case iclass_special:
case iclass_call:
case iclass_push:
case iclass_pushi:
case iclass_pushf:
case iclass_nop:
case iclass_mark_label:
break;
}
return 0;
}
static void
pushpop_inuse_regs(dill_stream c, int pop, virtual_insn* ip)
{
int i = 0;
/* no actual reg assigns, so only the params are in use */
for (i = 0; i < c->p->c_param_count; i++) {
if (c->p->c_param_args[i].is_register) {
c->j->save_restore(c, pop, c->p->c_param_args[i].type,
c->p->c_param_args[i].in_reg);
}
}
}
#define end_bb(b, lab, f) \
{ \
bb->end_branch_label = lab; \
bb->fall_through = f; \
bb->end = i - 1; \
vmi->bbcount++; \
vmi->bblist = realloc( \
vmi->bblist, sizeof(struct basic_block) * (vmi->bbcount + 1)); \
bb = &vmi->bblist[vmi->bbcount]; \
bb->start = i; \
bb->end = -1; \
bb->label = -1; \
bb->end_branch_label = -1; \
bb->fall_through = 0; \
bb->is_loop_start = 0; \
bb->is_loop_end = 0; \
bb->regs_used = new_bit_vec(c->p->vreg_count); \
bb->regs_defined = new_bit_vec(c->p->vreg_count); \
}
static bit_vec
new_bit_vec(int max)
{
int len = (max + 7) >> 3;
bit_vec ret = malloc(sizeof(struct bitv) + len - 2);
ret->len = len;
memset(&ret->vec[0], 0, len);
return ret;
}
static void
init_bit_vec(bit_vec vec, int size)
{
int len = size - 2;
vec->len = len;
memset(&vec->vec[0], 0, len);
}
static void
bit_vec_set(bit_vec v, int bit)
{
int index = bit >> 3;
int mask = 1 << (bit & 0x7);
v->vec[index] |= mask;
}
static void
bit_vec_clear(bit_vec v, int bit)
{
int index = bit >> 3;
int mask = ~(1 << (bit & 0x7));
v->vec[index] &= mask;
}
static int
bit_vec_is_set(bit_vec v, int bit)
{
int index = bit >> 3;
int mask = 1 << (bit & 0x7);
return ((v->vec[index] & mask) == mask);
}
static void
dump_reg_vec(bit_vec v)
{
int i;
if (v == NULL)
return;
for (i = 0; i < v->len; i++) {
int j;
for (j = 0; j < 7; j++) {
if ((v->vec[i] & (1 << j)) != 0) {
printf(" R%d", i * 8 + j + 100);
}
}
}
}
static int
has_single_def_use(dill_stream c, int vreg)
{
if (vreg >= 100) {
return ((c->p->vregs[vreg - 100].use_info.use_count == 1) &&
(c->p->vregs[vreg - 100].use_info.def_count == 1));
}
return 0;
}
static void
set_unused(dill_stream c, basic_block bb, int vreg)
{
if (vreg >= 100) {
c->p->vregs[vreg - 100].use_info.use_count = 0;
c->p->vregs[vreg - 100].use_info.def_count = 0;
bit_vec_clear(bb->regs_defined, vreg - 100);
bit_vec_clear(bb->regs_used, vreg - 100);
}
}
static void
set_used(dill_stream c, int vreg)
{
if (vreg >= 100) {
c->p->vregs[vreg - 100].use_info.use_count++;
} else {
c->p->c_param_args[vreg].used++;
}
}
static void
set_defined(dill_stream c, int vreg)
{
if (vreg >= 100) {
c->p->vregs[vreg - 100].use_info.def_count++;
}
}
static void
bb_defines(dill_stream c, basic_block bb, int vreg)
{
if (vreg >= 100) {
/* not param */
if (!bit_vec_is_set(bb->regs_used, vreg - 100)) {
bit_vec_set(bb->regs_defined, vreg - 100);
}
set_defined(c, vreg);
}
}
static void
bb_uses(dill_stream c, basic_block bb, int vreg)
{
if (vreg >= 100) {
/* not param */
if (!bit_vec_is_set(bb->regs_defined, vreg - 100)) {
bit_vec_set(bb->regs_used, vreg - 100);
}
set_used(c, vreg);
}
}
static void
add_pred(basic_block bb, int pred)
{
bb->pred_list = realloc(bb->pred_list, (bb->pred_count + 1) * sizeof(int));
bb->pred_list[bb->pred_count] = pred;
bb->pred_count++;
}
static void
dump_bb(dill_stream c, struct basic_block* bb, int i)
{
size_t j;
printf(
"\nBasic block %d, start %zd, end %zd, label %d, fall %d, branch_to "
"%d\n",
i, bb->start, bb->end, bb->label, bb->fall_through,
bb->end_branch_label);
printf(" defines :");
dump_reg_vec(bb->regs_defined);
printf("\n uses :");
dump_reg_vec(bb->regs_used);
printf("\n live_at_end :");
dump_reg_vec(bb->live_at_end);
printf("\n succ :");
for (j = 0; j < bb->succ_count; j++) {
printf(" %d", bb->succ_list[j]);
}
printf("\n preds :");
for (j = 0; j < bb->pred_count; j++) {
printf(" %d", bb->pred_list[j]);
}
if (bb->is_loop_start)
printf(" - LOOP_START");
if (bb->is_loop_end)
printf(" - LOOP_END");
printf("\n");
for (j = (size_t)bb->start; j <= (size_t)bb->end; j++) {
printf(" %zd - ", j);
virtual_print_insn(
c, NULL,
((char*)c->p->virtual.code_base) + j * sizeof(virtual_insn));
printf("\n");
}
}
static void
dump_bbs(dill_stream c)
{
virtual_mach_info vmi = (virtual_mach_info)c->p->mach_info;
int i;
for (i = 0; i < vmi->bbcount; i++) {
dump_bb(c, &vmi->bblist[i], i);
}
}
static int
add_regs(bit_vec dest, bit_vec src)
{
int change = 0;
int i, len = dest->len;
if (len > src->len)
i = src->len;
for (i = 0; i < len; i++) {
char tmp = (dest->vec[i] | src->vec[i]);
if (tmp != dest->vec[i]) {
change = 1;
dest->vec[i] = tmp;
}
}
return change;
}
static void
remove_regs(bit_vec dest, bit_vec src)
{
int i, len = dest->len;
if (len > src->len)
i = src->len;
for (i = 0; i < len; i++) {
dest->vec[i] = (dest->vec[i] & ~src->vec[i]);
}
}
static void
clear_bit_vec(bit_vec b)
{
memset(&b->vec[0], 0, b->len);
}
static void
build_live(dill_stream c)
{
virtual_mach_info vmi = (virtual_mach_info)c->p->mach_info;
int i, change = 1;
bit_vec live_at_begin = new_bit_vec(c->p->vreg_count);
for (i = 0; i < vmi->bbcount; i++) {
basic_block bb = &vmi->bblist[i];
bb->live_at_end = new_bit_vec(c->p->vreg_count);
}
for (i = 0; i < vmi->bbcount; i++) {
basic_block bb = &vmi->bblist[i];
int j;
for (j = 0; j < bb->pred_count; j++) {
/* foreach predecessor add regs we use to preds live_at_end */
basic_block pred_bb = &vmi->bblist[bb->pred_list[j]];
(void)add_regs(pred_bb->live_at_end, bb->regs_used);
}
}
while (change) {
/* go through the bbs until live lists stabilize */
change = 0;
for (i = 0; i < vmi->bbcount; i++) {
basic_block bb = &vmi->bblist[i];
int j;
clear_bit_vec(live_at_begin);
add_regs(live_at_begin, bb->live_at_end);
remove_regs(live_at_begin, bb->regs_defined);
for (j = 0; j < bb->pred_count; j++) {
/*
* foreach predecessor add regs live at our beginning
* to preds live_at_end
*/
basic_block pred_bb = &vmi->bblist[bb->pred_list[j]];
change |= add_regs(pred_bb->live_at_end, live_at_begin);
}
}
}
free(live_at_begin);
}
static int
insn_defines(virtual_insn* insn)
{
switch (insn->class_code) {
case iclass_arith3:
case iclass_compare:
return insn->opnds.a3.dest;
case iclass_arith3i:
return insn->opnds.a3i.dest;
case iclass_arith2:
return insn->opnds.a2.dest;
case iclass_convert:
return insn->opnds.a2.dest;
case iclass_loadstorei:
if (insn->insn_code & 0x10) {
/* store */
return -1;
} else {
return insn->opnds.a3i.dest;
}
case iclass_lea:
return insn->opnds.a3i.dest;
case iclass_loadstore:
if (insn->insn_code & 0x10) {
/* store */
return -1;
} else {
return insn->opnds.a3.dest;
}
case iclass_set:
return insn->opnds.a3i.dest;
case iclass_setf:
return insn->opnds.sf.dest;
case iclass_mov:
return insn->opnds.a2.dest;
case iclass_reti:
case iclass_ret:
case iclass_branch:
case iclass_branchi:
case iclass_jump_to_label:
case iclass_jump_to_reg:
case iclass_jump_to_imm:
case iclass_special:
return -1;
case iclass_call: {
int typ = insn->insn_code & 0xf;
/* put the return register definition in the next bb */
if (typ != DILL_V) {
return insn->opnds.calli.src;
}
return -1;
}
case iclass_push:
case iclass_pushi:
case iclass_pushf:
case iclass_nop:
case iclass_mark_label:
return -1;
default:
assert(0);
}
return -1;
}
static int
insn_define_test(virtual_insn* insn, int vreg)
{
switch (insn->class_code) {
case iclass_arith3:
case iclass_compare:
return insn->opnds.a3.dest == vreg;
case iclass_arith3i:
return insn->opnds.a3i.dest == vreg;
case iclass_arith2:
return insn->opnds.a2.dest == vreg;
case iclass_convert:
return insn->opnds.a2.dest == vreg;
case iclass_lea:
return insn->opnds.a3i.dest == vreg;
case iclass_loadstorei:
if (insn->insn_code & 0x10) {
/* store */
return 0;
} else {
return insn->opnds.a3i.dest == vreg;
}
case iclass_loadstore:
if (insn->insn_code & 0x10) {
/* store */
return 0;
} else {
return insn->opnds.a3.dest == vreg;
}
case iclass_set:
return insn->opnds.a3i.dest == vreg;
case iclass_setf:
return insn->opnds.sf.dest == vreg;
case iclass_mov:
return insn->opnds.a2.dest == vreg;
case iclass_reti:
case iclass_ret:
case iclass_branch:
case iclass_branchi:
case iclass_jump_to_label:
case iclass_jump_to_reg:
case iclass_jump_to_imm:
case iclass_special:
return 0;
case iclass_call: {
int typ = insn->insn_code & 0xf;
/* put the return register definition in the next bb */
if (typ != DILL_V) {
return insn->opnds.calli.src == vreg;
}
return 0;
}
case iclass_push:
case iclass_pushi:
case iclass_pushf:
case iclass_nop:
case iclass_mark_label:
return 0;
default:
assert(0);
}
return 0;
}
static void
insn_uses(virtual_insn* insn, int* used)
{
used[0] = -1;
used[1] = -1;
used[2] = -1;
switch (insn->class_code) {
case iclass_arith3:
case iclass_compare:
used[0] = insn->opnds.a3.src1;
used[1] = insn->opnds.a3.src2;
break;
case iclass_arith3i:
used[0] = insn->opnds.a3i.src;
break;
case iclass_arith2:
used[0] = insn->opnds.a2.src;
break;
case iclass_convert:
used[0] = insn->opnds.a2.src;
break;
case iclass_lea:
used[0] = insn->opnds.a3i.src;
break;
case iclass_loadstorei:
used[0] = insn->opnds.a3i.src;
if (insn->insn_code & 0x10) {
/* store */
used[1] = insn->opnds.a3i.dest;
}
break;
case iclass_loadstore:
used[0] = insn->opnds.a3.src1;
used[1] = insn->opnds.a3.src2;
if (insn->insn_code & 0x10) {
/* store */
used[2] = insn->opnds.a3.dest;
}
break;
case iclass_set:
break;
case iclass_setf:
break;
case iclass_mov:
used[0] = insn->opnds.a2.src;
break;
case iclass_reti:
break;
case iclass_ret:
used[0] = insn->opnds.a1.src;
break;
case iclass_branch:
used[0] = insn->opnds.br.src1;
used[1] = insn->opnds.br.src2;
break;
case iclass_branchi:
used[0] = insn->opnds.bri.src;
break;
case iclass_jump_to_label:
break;
case iclass_jump_to_reg:
used[0] = insn->opnds.bri.src;
break;
case iclass_jump_to_imm:
case iclass_special:
break;
case iclass_call: {
int reg = insn->insn_code & 0x10;
if (reg != 0) {
size_t imm = (size_t)insn->opnds.calli.imm_l;
int src1_vreg = (int)imm;
used[0] = src1_vreg;
}
break;
}
case iclass_push:
if ((short)insn->opnds.a1.src >= 0)
used[0] = insn->opnds.a1.src;
break;
case iclass_pushi:
break;
case iclass_pushf:
break;
case iclass_nop:
break;
}
}
static void
replace_insn_src(virtual_insn* insn, int replace_vreg, int new_vreg)
{
switch (insn->class_code) {
case iclass_arith3:
case iclass_compare:
if (replace_vreg == insn->opnds.a3.src1) {
insn->opnds.a3.src1 = new_vreg;
return;
};
if (replace_vreg == insn->opnds.a3.src2) {
insn->opnds.a3.src2 = new_vreg;
return;
};
break;
case iclass_arith3i:
if (replace_vreg == insn->opnds.a3i.src) {
insn->opnds.a3i.src = new_vreg;
return;
};
break;
case iclass_arith2:
if (replace_vreg == insn->opnds.a2.src) {
insn->opnds.a2.src = new_vreg;
return;
};
break;
case iclass_convert:
if (replace_vreg == insn->opnds.a2.src) {
insn->opnds.a2.src = new_vreg;
return;
};
break;
case iclass_lea:
if (replace_vreg == insn->opnds.a3i.src) {
insn->opnds.a3i.src = new_vreg;
return;
};
break;
case iclass_loadstorei:
if (replace_vreg == insn->opnds.a3i.src) {
insn->opnds.a3i.src = new_vreg;
return;
};
if (insn->insn_code & 0x10) {
/* store */
if (replace_vreg == insn->opnds.a3i.dest) {
insn->opnds.a3i.dest = new_vreg;
return;
};
}
break;
case iclass_loadstore:
if (replace_vreg == insn->opnds.a3.src1) {
insn->opnds.a3.src1 = new_vreg;
return;
};
if (replace_vreg == insn->opnds.a3.src2) {
insn->opnds.a3.src2 = new_vreg;
return;
};
if (insn->insn_code & 0x10) {
/* store */
if (replace_vreg == insn->opnds.a3.dest) {
insn->opnds.a3.dest = new_vreg;
return;
};
}
break;
case iclass_set:
break;
case iclass_setf:
break;
case iclass_mov:
if (replace_vreg == insn->opnds.a2.src) {
insn->opnds.a2.src = new_vreg;
return;
};
break;
case iclass_reti:
break;
case iclass_ret:
if (replace_vreg == insn->opnds.a1.src) {
insn->opnds.a1.src = new_vreg;
return;
};
break;
case iclass_branch:
if (replace_vreg == insn->opnds.br.src1) {
insn->opnds.br.src1 = new_vreg;
return;
};
if (replace_vreg == insn->opnds.br.src2) {
insn->opnds.br.src2 = new_vreg;
return;
};
break;
case iclass_branchi:
if (replace_vreg == insn->opnds.bri.src) {
insn->opnds.bri.src = new_vreg;
return;
};
break;
case iclass_jump_to_label:
break;
case iclass_jump_to_reg:
if (replace_vreg == insn->opnds.bri.src) {
insn->opnds.bri.src = new_vreg;
return;
};
break;
case iclass_jump_to_imm:
case iclass_special:
break;
case iclass_call:
break;
case iclass_push:
if ((short)insn->opnds.a1.src >= 0)
if (replace_vreg == insn->opnds.a1.src) {
insn->opnds.a1.src = new_vreg;
return;
};
break;
case iclass_pushi:
break;
case iclass_pushf:
break;
case iclass_nop:
break;
}
assert(0);
}
static int
insn_use_test(virtual_insn* insn, int vreg)
{
switch (insn->class_code) {
case iclass_arith3:
case iclass_compare:
if (vreg == insn->opnds.a3.src1)
return 1;
if (vreg == insn->opnds.a3.src2)
return 1;
break;
case iclass_arith3i:
if (vreg == insn->opnds.a3i.src)
return 1;
break;
case iclass_arith2:
if (vreg == insn->opnds.a2.src)
return 1;
break;
case iclass_convert:
if (vreg == insn->opnds.a2.src)
return 1;
break;
case iclass_lea:
if (vreg == insn->opnds.a3i.src)
return 1;
break;
case iclass_loadstorei:
if (vreg == insn->opnds.a3i.src)
return 1;
if (insn->insn_code & 0x10) {
/* store */
if (vreg == insn->opnds.a3i.dest)
return 1;
}
break;
case iclass_loadstore:
if (vreg == insn->opnds.a3.src1)
return 1;
if (vreg == insn->opnds.a3.src2)
return 1;
if (insn->insn_code & 0x10) {
/* store */
if (vreg == insn->opnds.a3.dest)
return 1;
}
break;