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atmega-hal: update adc macro invocations
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NOTE: attiny-hal does not yet compile! But now atmega-hal does.
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@LuigiPiucco
LuigiPiucco committed Jan 29, 2024
1 parent a7f5763 commit c70bba4
Showing 1 changed file with 158 additions and 195 deletions.
353 changes: 158 additions & 195 deletions mcu/atmega-hal/src/adc.rs
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//! Analog-to-Digital Converter
use crate::port;
use crate::{pac, port::*};
pub use avr_hal_generic::adc::{AdcChannel, AdcOps, ClockDivider};

/// Check the [`avr_hal_generic::adc::Adc`] documentation.
Expand Down Expand Up @@ -96,232 +96,195 @@ pub mod channel {
feature = "atmega48p",
))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: crate::pac::adc::admux::MUX_A,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().variant(id));
},
pins: {
port::PC0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d),
port::PC1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d),
port::PC2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d),
port::PC3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d),
port::PC4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d),
port::PC5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d),
},
channels: {
impl AdcProvider<MegaA> for pac::ADC {
type Hal = crate::Atmega;

const PC0: DIDR0::ADC0D = pac::adc::admux::MUX_A::ADC0;
const PC1: DIDR0::ADC1D = pac::adc::admux::MUX_A::ADC1;
const PC2: DIDR0::ADC2D = pac::adc::admux::MUX_A::ADC2;
const PC3: DIDR0::ADC3D = pac::adc::admux::MUX_A::ADC3;
const PC4: DIDR0::ADC4D = pac::adc::admux::MUX_A::ADC4;
const PC5: DIDR0::ADC5D = pac::adc::admux::MUX_A::ADC5;
}

type ChannelId = pac::adc::admux::MUX_A;
pub enum Channels {
#[cfg(feature = "enable-extra-adc")]
channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6,
channel::ADC6 = pac::adc::admux::MUX_A::ADC6,
#[cfg(feature = "enable-extra-adc")]
channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7,
channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND,
channel::ADC7 = pac::adc::admux::MUX_A::ADC7,
channel::Vbg = pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd = pac::adc::admux::MUX_A::ADC_GND,
#[cfg(any(feature = "atmega328p", feature = "atmega328pb", feature = "atmega48p"))]
channel::Temperature: crate::pac::adc::admux::MUX_A::TEMPSENS,
},
channel::Temperature = pac::adc::admux::MUX_A::TEMPSENS,
}
}

#[cfg(any(feature = "atmega32a"))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: crate::pac::adc::admux::MUX_A,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().variant(id));
},
pins: {
port::PA0: (crate::pac::adc::admux::MUX_A::ADC0),
port::PA1: (crate::pac::adc::admux::MUX_A::ADC1),
port::PA2: (crate::pac::adc::admux::MUX_A::ADC2),
port::PA3: (crate::pac::adc::admux::MUX_A::ADC3),
port::PA4: (crate::pac::adc::admux::MUX_A::ADC4),
port::PA5: (crate::pac::adc::admux::MUX_A::ADC5),
port::PA6: (crate::pac::adc::admux::MUX_A::ADC6),
port::PA7: (crate::pac::adc::admux::MUX_A::ADC7),
},
channels: {
channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND,
},
impl AdcProvider<MegaA> for pac::ADC {
type Hal = crate::Atmega;

const PA0 = pac::adc::admux::MUX_A::ADC0;
const PA1 = pac::adc::admux::MUX_A::ADC1;
const PA2 = pac::adc::admux::MUX_A::ADC2;
const PA3 = pac::adc::admux::MUX_A::ADC3;
const PA4 = pac::adc::admux::MUX_A::ADC4;
const PA5 = pac::adc::admux::MUX_A::ADC5;
const PA6 = pac::adc::admux::MUX_A::ADC6;
const PA7 = pac::adc::admux::MUX_A::ADC7;
}

type ChannelId = pac::adc::admux::MUX_A;
pub enum Channels {
channel::Vbg = pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd = pac::adc::admux::MUX_A::ADC_GND,
}
}

#[cfg(feature = "atmega32u4")]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: u8,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().bits(id & 0x1f));
peripheral.adcsrb.modify(|_, w| w.mux5().bit(id & 0x20 != 0));
},
pins: {
port::PF0: (0b000000, didr0::adc0d),
port::PF1: (0b000001, didr0::adc1d),
port::PF4: (0b000100, didr0::adc4d),
port::PF5: (0b000101, didr0::adc5d),
port::PF6: (0b000110, didr0::adc6d),
port::PF7: (0b000111, didr0::adc7d),
port::PD4: (0b100000, didr2::adc8d),
port::PD6: (0b100001, didr2::adc9d),
port::PD7: (0b100010, didr2::adc10d),
port::PB4: (0b100011, didr2::adc11d),
port::PB5: (0b100100, didr2::adc12d),
port::PB6: (0b100101, didr2::adc13d),
},
channels: {
channel::Vbg: 0b011110,
channel::Gnd: 0b011111,
channel::Temperature: 0b100111,
},
impl AdcProvider<MegaAB> for pac::ADC {
type Hal = crate::Atmega;

const PF0: DIDR0::ADC0D = 0b000000;
const PF1: DIDR0::ADC1D = 0b000001;
const PF4: DIDR0::ADC4D = 0b000100;
const PF5: DIDR0::ADC5D = 0b000101;
const PF6: DIDR0::ADC6D = 0b000110;
const PF7: DIDR0::ADC7D = 0b000111;
const PD4: DIDR2::ADC8D = 0b100000;
const PD6: DIDR2::ADC9D = 0b100001;
const PD7: DIDR2::ADC10D = 0b100010;
const PB4: DIDR2::ADC11D = 0b100011;
const PB5: DIDR2::ADC12D = 0b100100;
const PB6: DIDR2::ADC13D = 0b100101;
}

pub enum Channels {
channel::Vbg = 0b011110,
channel::Gnd = 0b011111,
channel::Temperature = 0b100111,
}
}

#[cfg(feature = "atmega128a")]
#[cfg(any(feature = "atmega128a"))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: crate::pac::adc::admux::MUX_A,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().variant(id));
},
pins: {
port::PF0: (crate::pac::adc::admux::MUX_A::ADC0),
port::PF1: (crate::pac::adc::admux::MUX_A::ADC1),
port::PF2: (crate::pac::adc::admux::MUX_A::ADC2),
port::PF3: (crate::pac::adc::admux::MUX_A::ADC3),
port::PF4: (crate::pac::adc::admux::MUX_A::ADC4),
port::PF5: (crate::pac::adc::admux::MUX_A::ADC5),
port::PF6: (crate::pac::adc::admux::MUX_A::ADC6),
port::PF7: (crate::pac::adc::admux::MUX_A::ADC7),
},
channels: {
channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND,
},
}
impl AdcProvider<MegaA> for pac::ADC {
type Hal = crate::Atmega;

const PF0 = pac::adc::admux::MUX_A::ADC0;
const PF1 = pac::adc::admux::MUX_A::ADC1;
const PF2 = pac::adc::admux::MUX_A::ADC2;
const PF3 = pac::adc::admux::MUX_A::ADC3;
const PF4 = pac::adc::admux::MUX_A::ADC4;
const PF5 = pac::adc::admux::MUX_A::ADC5;
const PF6 = pac::adc::admux::MUX_A::ADC6;
const PF7 = pac::adc::admux::MUX_A::ADC7;
}

type ChannelId = pac::adc::admux::MUX_A;
pub enum Channels {
channel::Vbg = pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd = pac::adc::admux::MUX_A::ADC_GND,
}
}

#[cfg(any(feature = "atmega2560", feature = "atmega1280"))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: u8,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().bits(id & 0x1f));
peripheral.adcsrb.modify(|_, w| w.mux5().bit(id & 0x20 != 0));
},
pins: {
port::PF0: (0b000000, didr0::adc0d),
port::PF1: (0b000001, didr0::adc1d),
port::PF2: (0b000010, didr0::adc2d),
port::PF3: (0b000011, didr0::adc3d),
port::PF4: (0b000100, didr0::adc4d),
port::PF5: (0b000101, didr0::adc5d),
port::PF6: (0b000110, didr0::adc6d),
port::PF7: (0b000111, didr0::adc7d),
port::PK0: (0b100000, didr2::adc8d),
port::PK1: (0b100001, didr2::adc9d),
port::PK2: (0b100010, didr2::adc10d),
port::PK3: (0b100011, didr2::adc11d),
port::PK4: (0b100100, didr2::adc12d),
port::PK5: (0b100101, didr2::adc13d),
port::PK6: (0b100110, didr2::adc14d),
port::PK7: (0b100111, didr2::adc15d),
},
channels: {
channel::Vbg: 0b011110,
channel::Gnd: 0b011111,
},
impl AdcProvider<MegaAB> for pac::ADC {
type Hal = crate::Atmega;

const PF0: DIDR0::ADC0D = 0b000000;
const PF1: DIDR0::ADC1D = 0b000001;
const PF2: DIDR0::ADC2D = 0b000010;
const PF3: DIDR0::ADC3D = 0b000011;
const PF4: DIDR0::ADC4D = 0b000100;
const PF5: DIDR0::ADC5D = 0b000101;
const PF6: DIDR0::ADC6D = 0b000110;
const PF7: DIDR0::ADC7D = 0b000111;
const PK0: DIDR2::ADC8D = 0b100000;
const PK1: DIDR2::ADC9D = 0b100001;
const PK2: DIDR2::ADC10D = 0b100010;
const PK3: DIDR2::ADC11D = 0b100011;
const PK4: DIDR2::ADC12D = 0b100100;
const PK5: DIDR2::ADC13D = 0b100101;
const PK6: DIDR2::ADC14D = 0b100110;
const PK7: DIDR2::ADC15D = 0b100111;
}

pub enum Channels {
channel::Vbg = 0b011110,
channel::Gnd = 0b011111,
}
}

#[cfg(any(feature = "atmega1284p"))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: crate::pac::adc::admux::MUX_A,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().variant(id));
},
pins: {
port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d),
port::PA1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d),
port::PA2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d),
port::PA3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d),
port::PA4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d),
port::PA5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d),
},
channels: {
impl AdcProvider<MegaA> for pac::ADC {
type Hal = crate::Atmega;

const PA0: DIDR0::ADC0D = pac::adc::admux::MUX_A::ADC0;
const PA1: DIDR0::ADC1D = pac::adc::admux::MUX_A::ADC1;
const PA2: DIDR0::ADC2D = pac::adc::admux::MUX_A::ADC2;
const PA3: DIDR0::ADC3D = pac::adc::admux::MUX_A::ADC3;
const PA4: DIDR0::ADC4D = pac::adc::admux::MUX_A::ADC4;
const PA5: DIDR0::ADC5D = pac::adc::admux::MUX_A::ADC5;
}

type ChannelId = pac::adc::admux::MUX_A;
pub enum Channels {
#[cfg(feature = "enable-extra-adc")]
channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6,
channel::ADC6 = pac::adc::admux::MUX_A::ADC6,
#[cfg(feature = "enable-extra-adc")]
channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7,
channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND,
},
channel::ADC7 = pac::adc::admux::MUX_A::ADC7,
channel::Vbg = pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd = pac::adc::admux::MUX_A::ADC_GND,
}
}

#[cfg(any(feature = "atmega8"))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: crate::pac::adc::admux::MUX_A,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().variant(id));
},
pins: {
port::PC0: (crate::pac::adc::admux::MUX_A::ADC0),
port::PC1: (crate::pac::adc::admux::MUX_A::ADC1),
port::PC2: (crate::pac::adc::admux::MUX_A::ADC2),
port::PC3: (crate::pac::adc::admux::MUX_A::ADC3),
port::PC4: (crate::pac::adc::admux::MUX_A::ADC4),
port::PC5: (crate::pac::adc::admux::MUX_A::ADC5),
},
channels: {
impl AdcProvider<MegaA> for pac::ADC {
type Hal = crate::Atmega;

const PC0 = pac::adc::admux::MUX_A::ADC0;
const PC1 = pac::adc::admux::MUX_A::ADC1;
const PC2 = pac::adc::admux::MUX_A::ADC2;
const PC3 = pac::adc::admux::MUX_A::ADC3;
const PC4 = pac::adc::admux::MUX_A::ADC4;
const PC5 = pac::adc::admux::MUX_A::ADC5;
}

type ChannelId = pac::adc::admux::MUX_A;
pub enum Channels {
#[cfg(feature = "enable-extra-adc")]
channel::ADC6: crate::pac::adc::admux::MUX_A::ADC6,
channel::ADC6 = pac::adc::admux::MUX_A::ADC6,
#[cfg(feature = "enable-extra-adc")]
channel::ADC7: crate::pac::adc::admux::MUX_A::ADC7,
channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND,
},
channel::ADC7 = pac::adc::admux::MUX_A::ADC7,
channel::Vbg = pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd = pac::adc::admux::MUX_A::ADC_GND,
}
}

#[cfg(any(feature = "atmega164pa"))]
avr_hal_generic::impl_adc! {
hal: crate::Atmega,
peripheral: crate::pac::ADC,
settings: AdcSettings,
apply_settings: |peripheral, settings| { apply_settings(peripheral, settings) },
channel_id: crate::pac::adc::admux::MUX_A,
set_channel: |peripheral, id| {
peripheral.admux.modify(|_, w| w.mux().variant(id));
},
pins: {
port::PA0: (crate::pac::adc::admux::MUX_A::ADC0, didr0::adc0d),
port::PA1: (crate::pac::adc::admux::MUX_A::ADC1, didr0::adc1d),
port::PA2: (crate::pac::adc::admux::MUX_A::ADC2, didr0::adc2d),
port::PA3: (crate::pac::adc::admux::MUX_A::ADC3, didr0::adc3d),
port::PA4: (crate::pac::adc::admux::MUX_A::ADC4, didr0::adc4d),
port::PA5: (crate::pac::adc::admux::MUX_A::ADC5, didr0::adc5d),
port::PA6: (crate::pac::adc::admux::MUX_A::ADC6, didr0::adc6d),
port::PA7: (crate::pac::adc::admux::MUX_A::ADC7, didr0::adc7d),
},
channels: {
channel::Vbg: crate::pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd: crate::pac::adc::admux::MUX_A::ADC_GND,
},
impl AdcProvider<MegaA> for pac::ADC {
type Hal = crate::Atmega;

const PC0 = pac::adc::admux::MUX_A::ADC0;
const PC1 = pac::adc::admux::MUX_A::ADC1;
const PC2 = pac::adc::admux::MUX_A::ADC2;
const PC3 = pac::adc::admux::MUX_A::ADC3;
const PC4 = pac::adc::admux::MUX_A::ADC4;
const PC5 = pac::adc::admux::MUX_A::ADC5;
const PC6 = pac::adc::admux::MUX_A::ADC6;
const PC7 = pac::adc::admux::MUX_A::ADC7;
}

type ChannelId = pac::adc::admux::MUX_A;
pub enum Channels {
channel::Vbg = pac::adc::admux::MUX_A::ADC_VBG,
channel::Gnd = pac::adc::admux::MUX_A::ADC_GND,
}
}

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