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Pillar1989Pillar1989
authored
Merge pull request #127 from techie66/master
Support for 12Mhz Crystals
2 parents 5a41853 + c991cac commit b517530

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3 files changed

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3 files changed

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‎src/mcp2515_can.cpp

Lines changed: 103 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -533,6 +533,109 @@ byte mcp2515_can::mcp2515_configRate(const byte canSpeed, const byte clock) {
533533
}
534534
break;
535535

536+
case (MCP_12MHz) :
537+
switch (canSpeed) {
538+
case (CAN_20KBPS) :
539+
cfg1 = MCP_12MHz_20kBPS_CFG1;
540+
cfg2 = MCP_12MHz_20kBPS_CFG2;
541+
cfg3 = MCP_12MHz_20kBPS_CFG3;
542+
break;
543+
544+
case (CAN_25KBPS) :
545+
cfg1 = MCP_12MHz_25kBPS_CFG1;
546+
cfg2 = MCP_12MHz_25kBPS_CFG2;
547+
cfg3 = MCP_12MHz_25kBPS_CFG3;
548+
break;
549+
550+
case (CAN_31K25BPS) :
551+
cfg1 = MCP_12MHz_31k25BPS_CFG1;
552+
cfg2 = MCP_12MHz_31k25BPS_CFG2;
553+
cfg3 = MCP_12MHz_31k25BPS_CFG3;
554+
break;
555+
556+
case (CAN_33KBPS) :
557+
cfg1 = MCP_12MHz_33kBPS_CFG1;
558+
cfg2 = MCP_12MHz_33kBPS_CFG2;
559+
cfg3 = MCP_12MHz_33kBPS_CFG3;
560+
break;
561+
562+
case (CAN_40KBPS) :
563+
cfg1 = MCP_12MHz_40kBPS_CFG1;
564+
cfg2 = MCP_12MHz_40kBPS_CFG2;
565+
cfg3 = MCP_12MHz_40kBPS_CFG3;
566+
break;
567+
568+
case (CAN_50KBPS) :
569+
cfg1 = MCP_12MHz_50kBPS_CFG1;
570+
cfg2 = MCP_12MHz_50kBPS_CFG2;
571+
cfg3 = MCP_12MHz_50kBPS_CFG3;
572+
break;
573+
574+
case (CAN_80KBPS) :
575+
cfg1 = MCP_12MHz_80kBPS_CFG1;
576+
cfg2 = MCP_12MHz_80kBPS_CFG2;
577+
cfg3 = MCP_12MHz_80kBPS_CFG3;
578+
break;
579+
580+
case (CAN_83K3BPS) :
581+
cfg1 = MCP_12MHz_83k3BPS_CFG1;
582+
cfg2 = MCP_12MHz_83k3BPS_CFG2;
583+
cfg3 = MCP_12MHz_83k3BPS_CFG3;
584+
break;
585+
586+
case (CAN_95KBPS) :
587+
cfg1 = MCP_12MHz_95kBPS_CFG1;
588+
cfg2 = MCP_12MHz_95kBPS_CFG2;
589+
cfg3 = MCP_12MHz_95kBPS_CFG3;
590+
break;
591+
592+
case (CAN_100KBPS) :
593+
cfg1 = MCP_12MHz_100kBPS_CFG1;
594+
cfg2 = MCP_12MHz_100kBPS_CFG2;
595+
cfg3 = MCP_12MHz_100kBPS_CFG3;
596+
break;
597+
598+
case (CAN_125KBPS) :
599+
cfg1 = MCP_12MHz_125kBPS_CFG1;
600+
cfg2 = MCP_12MHz_125kBPS_CFG2;
601+
cfg3 = MCP_12MHz_125kBPS_CFG3;
602+
break;
603+
604+
case (CAN_200KBPS) :
605+
cfg1 = MCP_12MHz_200kBPS_CFG1;
606+
cfg2 = MCP_12MHz_200kBPS_CFG2;
607+
cfg3 = MCP_12MHz_200kBPS_CFG3;
608+
break;
609+
610+
case (CAN_250KBPS) :
611+
cfg1 = MCP_12MHz_250kBPS_CFG1;
612+
cfg2 = MCP_12MHz_250kBPS_CFG2;
613+
cfg3 = MCP_12MHz_250kBPS_CFG3;
614+
break;
615+
616+
case (CAN_500KBPS) :
617+
cfg1 = MCP_12MHz_500kBPS_CFG1;
618+
cfg2 = MCP_12MHz_500kBPS_CFG2;
619+
cfg3 = MCP_12MHz_500kBPS_CFG3;
620+
break;
621+
622+
case (CAN_666KBPS) :
623+
cfg1 = MCP_12MHz_666kBPS_CFG1;
624+
cfg2 = MCP_12MHz_666kBPS_CFG2;
625+
cfg3 = MCP_12MHz_666kBPS_CFG3;
626+
break;
627+
628+
case (CAN_1000KBPS) :
629+
cfg1 = MCP_12MHz_1000kBPS_CFG1;
630+
cfg2 = MCP_12MHz_1000kBPS_CFG2;
631+
cfg3 = MCP_12MHz_1000kBPS_CFG3;
632+
break;
633+
634+
default:
635+
set = 0;
636+
break;
637+
}
638+
break;
536639
case (MCP_8MHz) :
537640
switch (canSpeed) {
538641
case (CAN_5KBPS) :

‎src/mcp2515_can_dfs.h

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -350,6 +350,73 @@
350350
#define MCP_16MHz_5kBPS_CFG3 (0x87)
351351

352352

353+
// speed 12M
354+
355+
#define MCP_12MHz_1000kBPS_CFG1 (0x00)//
356+
#define MCP_12MHz_1000kBPS_CFG2 (0x88)//
357+
#define MCP_12MHz_1000kBPS_CFG3 (0x01)//
358+
359+
#define MCP_12MHz_666kBPS_CFG1 (0x00)//
360+
#define MCP_12MHz_666kBPS_CFG2 (0x92)//
361+
#define MCP_12MHz_666kBPS_CFG3 (0x01)//
362+
363+
#define MCP_12MHz_500kBPS_CFG1 (0x00)
364+
#define MCP_12MHz_500kBPS_CFG2 (0x9B)
365+
#define MCP_12MHz_500kBPS_CFG3 (0x02)
366+
367+
#define MCP_12MHz_250kBPS_CFG1 (0x00)//
368+
#define MCP_12MHz_250kBPS_CFG2 (0xBF)//
369+
#define MCP_12MHz_250kBPS_CFG3 (0x06)///
370+
371+
#define MCP_12MHz_200kBPS_CFG1 (0x01)//
372+
#define MCP_12MHz_200kBPS_CFG2 (0xA4)//
373+
#define MCP_12MHz_200kBPS_CFG3 (0x03)//
374+
375+
#define MCP_12MHz_125kBPS_CFG1 (0x01)//
376+
#define MCP_12MHz_125kBPS_CFG2 (0xBF)//
377+
#define MCP_12MHz_125kBPS_CFG3 (0x06)//
378+
379+
#define MCP_12MHz_100kBPS_CFG1 (0x02)//
380+
#define MCP_12MHz_100kBPS_CFG2 (0xB6)//
381+
#define MCP_12MHz_100kBPS_CFG3 (0x04)//
382+
383+
#define MCP_12MHz_95kBPS_CFG1 (0x02)//
384+
#define MCP_12MHz_95kBPS_CFG2 (0xBE)//
385+
#define MCP_12MHz_95kBPS_CFG3 (0x04)//
386+
387+
#define MCP_12MHz_83k3BPS_CFG1 (0x03)//
388+
#define MCP_12MHz_83k3BPS_CFG2 (0xB5)//
389+
#define MCP_12MHz_83k3BPS_CFG3 (0x03)//
390+
391+
#define MCP_12MHz_80kBPS_CFG1 (0x04)//
392+
#define MCP_12MHz_80kBPS_CFG2 (0xA4)//
393+
#define MCP_12MHz_80kBPS_CFG3 (0x03)//
394+
395+
#define MCP_12MHz_50kBPS_CFG1 (0x05)//
396+
#define MCP_12MHz_50kBPS_CFG2 (0xB6)//
397+
#define MCP_12MHz_50kBPS_CFG3 (0x04)//
398+
399+
#define MCP_12MHz_40kBPS_CFG1 (0x09)//
400+
#define MCP_12MHz_40kBPS_CFG2 (0xA4)//
401+
#define MCP_12MHz_40kBPS_CFG3 (0x03)//
402+
403+
#define MCP_12MHz_33kBPS_CFG1 (0x0C)//
404+
#define MCP_12MHz_33kBPS_CFG2 (0xA4)//
405+
#define MCP_12MHz_33kBPS_CFG3 (0x02)//
406+
407+
#define MCP_12MHz_31k25BPS_CFG1 (0x0B)//
408+
#define MCP_12MHz_31k25BPS_CFG2 (0xAC)//
409+
#define MCP_12MHz_31k25BPS_CFG3 (0x03)//
410+
411+
#define MCP_12MHz_25kBPS_CFG1 (0X0B)//
412+
#define MCP_12MHz_25kBPS_CFG2 (0XB6)//
413+
#define MCP_12MHz_25kBPS_CFG3 (0X04)//
414+
415+
#define MCP_12MHz_20kBPS_CFG1 (0x0C)//
416+
#define MCP_12MHz_20kBPS_CFG2 (0xBF)//
417+
#define MCP_12MHz_20kBPS_CFG3 (0x05)//
418+
419+
353420

354421
// speed 8M
355422

‎src/mcp_can.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ typedef enum {
2020
MCP_NO_MHz,
2121
/* apply to MCP2515 */
2222
MCP_16MHz,
23+
MCP_12MHz,
2324
MCP_8MHz,
2425
/* apply to MCP2518FD */
2526
MCP2518FD_40MHz = MCP_16MHz /* To compatible MCP2515 shield */,

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