diff --git a/patches/u-boot/0002-pci-ls_pcie_g4-Wait-100ms-for-Link-Up-in-ls_pcie_g4_.patch b/patches/u-boot/0002-pci-ls_pcie_g4-Wait-100ms-for-Link-Up-in-ls_pcie_g4_.patch
index 02cdff7..ab22037 100644
--- a/patches/u-boot/0002-pci-ls_pcie_g4-Wait-100ms-for-Link-Up-in-ls_pcie_g4_.patch
+++ b/patches/u-boot/0002-pci-ls_pcie_g4-Wait-100ms-for-Link-Up-in-ls_pcie_g4_.patch
@@ -18,7 +18,8 @@ diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_ge
 index 6ecdd6af408..eeda47470c1 100644
 --- a/drivers/pci/pcie_layerscape_gen4.c
 +++ b/drivers/pci/pcie_layerscape_gen4.c
-@@ -19,6 +19,9 @@
+@@ -19,6 +19,10 @@
++#include <linux/delay.h>
  
  #include "pcie_layerscape_gen4.h"
  
@@ -28,7 +29,7 @@ index 6ecdd6af408..eeda47470c1 100644
  DECLARE_GLOBAL_DATA_PTR;
  
  LIST_HEAD(ls_pcie_g4_list);
-@@ -50,6 +53,22 @@ static int ls_pcie_g4_link_up(struct ls_pcie_g4 *pcie)
+@@ -50,6 +54,22 @@ static int ls_pcie_g4_link_up(struct ls_pcie_g4 *pcie)
  	return 1;
  }
  
@@ -51,7 +52,7 @@ index 6ecdd6af408..eeda47470c1 100644
  static void ls_pcie_g4_ep_enable_cfg(struct ls_pcie_g4 *pcie)
  {
  	ccsr_writel(pcie, GPEX_CFG_READY, PCIE_CONFIG_READY);
-@@ -548,7 +567,7 @@ static int ls_pcie_g4_probe(struct udevice *dev)
+@@ -548,7 +568,7 @@ static int ls_pcie_g4_probe(struct udevice *dev)
  	val |= PPIO_EN;
  	ccsr_writel(pcie, PAB_PEX_PIO_CTRL(0), val);
  
diff --git a/patches/u-boot/0003-pci-ls_pcie-Wait-100ms-for-Link-Up-in-ls_pcie_probe.patch b/patches/u-boot/0003-pci-ls_pcie-Wait-100ms-for-Link-Up-in-ls_pcie_probe.patch
index 074c735..904dc33 100644
--- a/patches/u-boot/0003-pci-ls_pcie-Wait-100ms-for-Link-Up-in-ls_pcie_probe.patch
+++ b/patches/u-boot/0003-pci-ls_pcie-Wait-100ms-for-Link-Up-in-ls_pcie_probe.patch
@@ -17,8 +17,9 @@ diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
 index 17969e2f236..c78b8efd521 100644
 --- a/drivers/pci/pcie_layerscape_rc.c
 +++ b/drivers/pci/pcie_layerscape_rc.c
-@@ -19,6 +19,9 @@
+@@ -19,6 +19,10 @@
  #endif
++#include <linux/delay.h>
  #include "pcie_layerscape.h"
  
 +#define LINK_WAIT_RETRIES	100
@@ -27,7 +28,7 @@ index 17969e2f236..c78b8efd521 100644
  DECLARE_GLOBAL_DATA_PTR;
  
  struct ls_pcie_drvdata {
-@@ -27,6 +30,22 @@ struct ls_pcie_drvdata {
+@@ -27,6 +31,22 @@ struct ls_pcie_drvdata {
  	bool big_endian;
  };
  
@@ -50,7 +51,7 @@ index 17969e2f236..c78b8efd521 100644
  static void ls_pcie_cfg0_set_busdev(struct ls_pcie_rc *pcie_rc, u32 busdev)
  {
  	struct ls_pcie *pcie = pcie_rc->pcie;
-@@ -375,7 +394,7 @@ static int ls_pcie_probe(struct udevice *dev)
+@@ -375,7 +395,7 @@ static int ls_pcie_probe(struct udevice *dev)
  	       "Root Complex");
  	ls_pcie_setup_ctrl(pcie_rc);