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Adding 'sb' instruction to spin_delay() for ARM v8.5 onward #18

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Adding 'sb' instruction to spin_delay() for ARM v8.5 onward #18

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34 changes: 33 additions & 1 deletion src/include/aerospike/as_arch.h
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Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,39 @@

#elif defined __aarch64__

#define as_arch_pause() asm volatile("isb" : : : "memory")
#if defined(__linux__) && (defined(__GNUC__) || defined(__clang__))
#include <sys/auxv.h>

#ifndef HWCAP_SB
#define HWCAP_SB (1 << 29)
#endif // HWCAP_SB

static inline void as_arch_pause(void)
{
static int use_spin_delay_sb = -1;

if (__builtin_expect(use_spin_delay_sb == 1, 1)) {
asm volatile(".inst 0xd50330ff" : : : "memory"); // SB instruction encoding
}
else if (use_spin_delay_sb == 0) {
asm volatile("isb" : : : "memory");
}
else {
// Initialize variable and check if SB is supported
if (getauxval(AT_HWCAP) & HWCAP_SB)
use_spin_delay_sb = 1;
else
use_spin_delay_sb = 0;
}
}
#else
static inline void as_arch_pause(void)
{
asm volatile("isb" : : : "memory");
}
#endif // __linux__ __GNUC__ __clang__

#define as_arch_pause() as_arch_pause()

#endif

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