From ff0519f98d0d02e4deee5b15fc33f4d693d163f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tobias=20M=C3=BCller?= Date: Fri, 26 Mar 2021 09:54:58 +0100 Subject: [PATCH] Add RGMIIResource --- amaranth_boards/resources/interface.py | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/amaranth_boards/resources/interface.py b/amaranth_boards/resources/interface.py index 8941be1d..c0cc36de 100644 --- a/amaranth_boards/resources/interface.py +++ b/amaranth_boards/resources/interface.py @@ -3,7 +3,7 @@ __all__ = [ "UARTResource", "IrDAResource", "SPIResource", "I2CResource", - "DirectUSBResource", "ULPIResource", "PS2Resource", + "DirectUSBResource", "ULPIResource", "PS2Resource", "RGMIIResource", ] @@ -142,3 +142,20 @@ def PS2Resource(*args, clk, dat, conn=None, attrs=None): ios.append(attrs) return Resource.family(*args, default_name="ps2", ios=ios) + + +def RGMIIResource(*args, txc, txd, tx_ctl, rxc, rxd, rx_ctl, mdc, mdio, attrs=None, conn=None): + io = [] + + io.append(Subsignal("txc", Pins(txc, dir="o", conn=conn, assert_width=1))) + io.append(Subsignal("txd", Pins(txd, dir="o", conn=conn, assert_width=4))) + io.append(Subsignal("tx_ctl", Pins(txc, dir="o", conn=conn, assert_width=1))) + io.append(Subsignal("rxc", Pins(rxc, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("rxd", Pins(rxd, dir="i", conn=conn, assert_width=4))) + io.append(Subsignal("rx_ctl", Pins(txc, dir="i", conn=conn, assert_width=1))) + io.append(Subsignal("mdc", Pins(mdc, dir="o", conn=conn, assert_width=1))) + io.append(Subsignal("mdio", Pins(mdio, dir="io", conn=conn, assert_width=1))) + + if attrs is not None: + io.append(attrs) + return Resource.family(*args, default_name="rgmii", ios=io)