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Ho Chi Minh city University of Technology
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11:38
(UTC +07:00) - linkedin.com/in/taitrananh
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Dual-issue-Microcontroller
Dual-issue-Microcontroller PublicRTL code for Dual-issue microcontroller (Verilog)
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AXI4-Interconnect
AXI4-Interconnect PublicRTL code for AXI4 Interconnect (Verilog). Supports weighted round-robin arbitration, n-channel master, 4Kb splitting, reorder transaction.
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DVP-RX-Controller
DVP-RX-Controller PublicThis repository contains the RTL code of a DVP (Digital Video Port) TX Controller with AXI4 interface in the application layer.
Verilog
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Digital-Camera-ASIC/DBI-TX-Controller
Digital-Camera-ASIC/DBI-TX-Controller PublicThis repository contains the RTL code of a MIPI DBI (TX) Controller with AXI4 interface in the application layer.
Verilog
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