From d337bac58b790fe3f05e0f890e30ddccdcd7e0f9 Mon Sep 17 00:00:00 2001 From: Axel Heider Date: Thu, 3 Feb 2022 14:55:46 +0100 Subject: [PATCH] python: separate RISC-V config for 32/64 bit Signed-off-by: Axel Heider --- tools/hardware/config.py | 38 +++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/tools/hardware/config.py b/tools/hardware/config.py index 527c46ebc8b..748a2f2af4d 100644 --- a/tools/hardware/config.py +++ b/tools/hardware/config.py @@ -31,7 +31,7 @@ def get_device_page_bits(self) -> int: return self.get_page_bits() -class ARMConfig(Config): +class Config_ARM(Config): ''' Config class for ARM ''' arch = 'arm' SUPERSECTION_BITS = 24 # 2^24 = 16 MiByte @@ -41,29 +41,33 @@ def get_kernel_phys_align(self) -> int: return self.SUPERSECTION_BITS -class RISCVConfig(Config): - ''' Config class for RISCV ''' +class Config_RISCV32(Config): + ''' Config class for RISC-V 32-bit ''' arch = 'riscv' - MEGAPAGE_BITS_RV32 = 22 # 2^22 = 4 MiByte - MEGAPAGE_BITS_RV64 = 21 # 2^21 = 2 MiByte - MEGA_PAGE_SIZE_RV64 = 2**MEGAPAGE_BITS_RV64 + MEGAPAGE_BITS = 22 # 2^22 = 4 MiByte def get_device_page_bits(self) -> int: - ''' Get page size in bits for mapping devices for this arch ''' - if (self.sel4arch == 'riscv32'): - # 4MiB device pages - return self.MEGAPAGE_BITS_RV32 - elif (self.sel4arch == 'riscv64'): - # 2MiB device pages for sv39 and sv48 - return self.MEGAPAGE_BITS_RV64 - raise ValueError('Unsupported sel4arch "{}" specified.'.format(self.sel4arch)) + ''' kernel devices are mapped into megapages ''' + return self.MEGAPAGE_BITS + + +class Config_RISCV64(Config): + ''' Config class for RISC-V 64-bit ''' + arch = 'riscv' + MEGAPAGE_BITS = 21 # 2^21 = 2 MiByte + + def get_device_page_bits(self) -> int: + ''' kernel devices are mapped into megapages ''' + return self.MEGAPAGE_BITS def get_arch_config(sel4arch: str, addrspace_max: int) -> Config: ''' Return an appropriate Config object for the given architecture ''' if sel4arch in ['aarch32', 'aarch64', 'arm_hyp']: - return ARMConfig(sel4arch, addrspace_max) - elif sel4arch in ['riscv32', 'riscv64']: - return RISCVConfig(sel4arch, addrspace_max) + return Config_ARM(sel4arch, addrspace_max) + elif sel4arch == 'riscv32': + return Config_RISCV32(sel4arch, addrspace_max) + elif sel4arch == 'riscv64': + return Config_RISCV64(sel4arch, addrspace_max) else: raise ValueError('Unsupported sel4arch "{}" specified.'.format(sel4arch))