Skip to content

Commit

Permalink
updated API
Browse files Browse the repository at this point in the history
  • Loading branch information
Mojtaba Bisheh Niasar committed Feb 25, 2025
1 parent 1572c42 commit 9cd571b
Show file tree
Hide file tree
Showing 4 changed files with 12 additions and 12 deletions.
2 changes: 1 addition & 1 deletion src/mldsa_top/rtl/mldsa_reg.rdl
Original file line number Diff line number Diff line change
Expand Up @@ -163,7 +163,7 @@ addrmap mldsa_reg {
default hw = rw;
default we = true;
default resetsignal = reset_b;
field {desc = "Message Byte size field"; swwe = mldsa_ready; hwclr;} MSG_SIZE[24] = 32'b0;
field {desc = "Message Byte size field"; swwe = mldsa_ready; hwclr;} MSG_SIZE[28] = 28'b0;
field {desc = "Valid bits in last message byte"; swwe = mldsa_ready; hwclr;} MSG_LAST_BITS[4] = 4'b0;

} MLDSA_MSG_CONFIG;
Expand Down
12 changes: 6 additions & 6 deletions src/mldsa_top/rtl/mldsa_reg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -243,7 +243,7 @@ module mldsa_reg (
} [8-1:0]MLDSA_SIGN_RND;
struct packed{
struct packed{
logic [23:0] next;
logic [27:0] next;
logic load_next;
} MSG_SIZE;
struct packed{
Expand Down Expand Up @@ -435,7 +435,7 @@ module mldsa_reg (
} [8-1:0]MLDSA_SIGN_RND;
struct packed{
struct packed{
logic [23:0] value;
logic [27:0] value;
} MSG_SIZE;
struct packed{
logic [3:0] value;
Expand Down Expand Up @@ -761,12 +761,12 @@ module mldsa_reg (
end
// Field: mldsa_reg.MLDSA_MSG_CONFIG.MSG_SIZE
always_comb begin
automatic logic [23:0] next_c;
automatic logic [27:0] next_c;
automatic logic load_next_c;
next_c = field_storage.MLDSA_MSG_CONFIG.MSG_SIZE.value;
load_next_c = '0;
if(decoded_reg_strb.MLDSA_MSG_CONFIG && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write
next_c = (field_storage.MLDSA_MSG_CONFIG.MSG_SIZE.value & ~decoded_wr_biten[23:0]) | (decoded_wr_data[23:0] & decoded_wr_biten[23:0]);
next_c = (field_storage.MLDSA_MSG_CONFIG.MSG_SIZE.value & ~decoded_wr_biten[27:0]) | (decoded_wr_data[27:0] & decoded_wr_biten[27:0]);
load_next_c = '1;
end else if(hwif_in.MLDSA_MSG_CONFIG.MSG_SIZE.we) begin // HW Write - we
next_c = hwif_in.MLDSA_MSG_CONFIG.MSG_SIZE.next;
Expand All @@ -780,7 +780,7 @@ module mldsa_reg (
end
always_ff @(posedge clk or negedge hwif_in.reset_b) begin
if(~hwif_in.reset_b) begin
field_storage.MLDSA_MSG_CONFIG.MSG_SIZE.value <= 24'h0;
field_storage.MLDSA_MSG_CONFIG.MSG_SIZE.value <= 28'h0;
end else if(field_combo.MLDSA_MSG_CONFIG.MSG_SIZE.load_next) begin
field_storage.MLDSA_MSG_CONFIG.MSG_SIZE.value <= field_combo.MLDSA_MSG_CONFIG.MSG_SIZE.next;
end
Expand All @@ -793,7 +793,7 @@ module mldsa_reg (
next_c = field_storage.MLDSA_MSG_CONFIG.MSG_LAST_BITS.value;
load_next_c = '0;
if(decoded_reg_strb.MLDSA_MSG_CONFIG && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write
next_c = (field_storage.MLDSA_MSG_CONFIG.MSG_LAST_BITS.value & ~decoded_wr_biten[27:24]) | (decoded_wr_data[27:24] & decoded_wr_biten[27:24]);
next_c = (field_storage.MLDSA_MSG_CONFIG.MSG_LAST_BITS.value & ~decoded_wr_biten[31:28]) | (decoded_wr_data[31:28] & decoded_wr_biten[31:28]);
load_next_c = '1;
end else if(hwif_in.MLDSA_MSG_CONFIG.MSG_LAST_BITS.we) begin // HW Write - we
next_c = hwif_in.MLDSA_MSG_CONFIG.MSG_LAST_BITS.next;
Expand Down
4 changes: 2 additions & 2 deletions src/mldsa_top/rtl/mldsa_reg_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -91,7 +91,7 @@ package mldsa_reg_pkg;
} mldsa_reg__MLDSA_SIGN_RND__in_t;

typedef struct packed{
logic [23:0] next;
logic [27:0] next;
logic we;
logic hwclr;
} mldsa_reg__MLDSA_MSG_CONFIG__MSG_SIZE__in_t;
Expand Down Expand Up @@ -309,7 +309,7 @@ package mldsa_reg_pkg;
} mldsa_reg__MLDSA_SIGN_RND__out_t;

typedef struct packed{
logic [23:0] value;
logic [27:0] value;
} mldsa_reg__MLDSA_MSG_CONFIG__MSG_SIZE__out_t;

typedef struct packed{
Expand Down
6 changes: 3 additions & 3 deletions src/mldsa_top/rtl/mldsa_reg_uvm.sv
Original file line number Diff line number Diff line change
Expand Up @@ -250,7 +250,7 @@ package mldsa_reg_uvm;
protected uvm_reg_data_t m_data;
protected bit m_is_read;

mldsa_reg__MLDSA_MSG_CONFIG_bit_cg MSG_SIZE_bit_cg[24];
mldsa_reg__MLDSA_MSG_CONFIG_bit_cg MSG_SIZE_bit_cg[28];
mldsa_reg__MLDSA_MSG_CONFIG_bit_cg MSG_LAST_BITS_bit_cg[4];
mldsa_reg__MLDSA_MSG_CONFIG_fld_cg fld_cg;
rand uvm_reg_field MSG_SIZE;
Expand All @@ -267,9 +267,9 @@ package mldsa_reg_uvm;

virtual function void build();
this.MSG_SIZE = new("MSG_SIZE");
this.MSG_SIZE.configure(this, 24, 0, "WO", 1, 'h0, 1, 1, 0);
this.MSG_SIZE.configure(this, 28, 0, "WO", 1, 'h0, 1, 1, 0);
this.MSG_LAST_BITS = new("MSG_LAST_BITS");
this.MSG_LAST_BITS.configure(this, 4, 24, "WO", 1, 'h0, 1, 1, 0);
this.MSG_LAST_BITS.configure(this, 4, 28, "WO", 1, 'h0, 1, 1, 0);
if (has_coverage(UVM_CVR_REG_BITS)) begin
foreach(MSG_SIZE_bit_cg[bt]) MSG_SIZE_bit_cg[bt] = new();
foreach(MSG_LAST_BITS_bit_cg[bt]) MSG_LAST_BITS_bit_cg[bt] = new();
Expand Down

0 comments on commit 9cd571b

Please sign in to comment.