mldsa pcr signing

.github/workflow_metadata/pr_hash

@@ -1 +1 @@
-2b5d5480a88290833152d554d26989b7369e35dd426a284518f7c0599edfab1f1094a239fab6771d019fb9d0129c2126
+f335befe4dbb5241c7756f55dfd5f9859edbd8da0d347003ed5d1d461a06724b5139ae392397f4cad3e97b702fbd4b3b

.github/workflow_metadata/pr_timestamp

@@ -1 +1 @@
-1734475178
+1734985345

src/mldsa_top/rtl/mldsa_config_defines.svh

@@ -36,5 +36,7 @@
 
   `define MLDSA_CUSTOM_INF // KV interface\
                            output kv_read_t kv_read,\
-                           input kv_rd_resp_t kv_rd_resp,
+                           input kv_rd_resp_t kv_rd_resp,\
+                           //PCR Signing\
+                           input pcr_signing_t pcr_signing_data,
 `endif

src/mldsa_top/rtl/mldsa_ctrl.sv

@@ -140,6 +140,8 @@ module mldsa_ctrl
   // KV interface
   output kv_read_t kv_read,
   input kv_rd_resp_t kv_rd_resp,
+  //PCR Signing
+  input pcr_signing_t pcr_signing_data,
   `endif
 
   //Interrupts
@@ -166,6 +168,8 @@ module mldsa_ctrl
   //KV Seed Data Present
   logic kv_seed_data_present;
   logic kv_seed_data_present_set, kv_seed_data_present_reset;
+  logic pcr_sign_mode;
+  logic pcr_sign_input_invalid;
 
   always_comb begin: mldsa_kv_ctrl_reg
     //ready when fsm is not busy
@@ -224,6 +228,7 @@ always_ff @(posedge clk or negedge rst_b) begin : mldsa_kv_reg
 end
 
 always_comb mldsa_privkey_lock = kv_seed_data_present;
+always_comb pcr_sign_mode = mldsa_reg_hwif_out.MLDSA_CTRL.PCR_SIGN.value;
 
 `else
 always_comb begin: mldsa_kv_ctrl_reg
@@ -335,7 +340,12 @@ always_comb mldsa_privkey_lock = '0;
   always_comb mldsa_reg_hwif_in.mldsa_ready = mldsa_ready;
   always_comb cmd_reg = mldsa_reg_hwif_out.MLDSA_CTRL.CTRL.value;
   always_comb mldsa_reg_hwif_in.MLDSA_CTRL.CTRL.hwclr = |cmd_reg;
-
+  `ifdef CALIPTRA
+    always_comb mldsa_reg_hwif_in.MLDSA_CTRL.PCR_SIGN.hwclr = mldsa_reg_hwif_out.MLDSA_CTRL.PCR_SIGN.value;
+  `else
+    always_comb mldsa_reg_hwif_in.MLDSA_CTRL.PCR_SIGN.hwclr = '0;
+  `endif
+
   always_comb mldsa_reg_hwif_in.MLDSA_NAME[0].NAME.next = '0;
   always_comb mldsa_reg_hwif_in.MLDSA_NAME[1].NAME.next = '0;
   always_comb mldsa_reg_hwif_in.MLDSA_VERSION[0].VERSION.next = '0;
@@ -357,8 +367,9 @@ always_comb mldsa_privkey_lock = '0;
       seed_reg[dword] = mldsa_reg_hwif_out.MLDSA_SEED[SEED_NUM_DWORDS-1-dword].SEED.value;
 
       `ifdef CALIPTRA
-      mldsa_reg_hwif_in.MLDSA_SEED[dword].SEED.we = (kv_seed_write_en & (kv_seed_write_offset == dword)) & ~zeroize;
-      mldsa_reg_hwif_in.MLDSA_SEED[dword].SEED.next = kv_seed_write_data;
+      mldsa_reg_hwif_in.MLDSA_SEED[dword].SEED.we = (pcr_sign_mode | (kv_seed_write_en & (kv_seed_write_offset == dword))) & ~zeroize;
+      mldsa_reg_hwif_in.MLDSA_SEED[dword].SEED.next = pcr_sign_mode   ? pcr_signing_data.pcr_mldsa_signing_seed[dword] : 
+                                                      kv_seed_write_data;
       mldsa_reg_hwif_in.MLDSA_SEED[dword].SEED.hwclr = zeroize | kv_seed_data_present_reset | (kv_seed_error == KV_READ_FAIL);
       mldsa_reg_hwif_in.MLDSA_SEED[dword].SEED.swwe = mldsa_ready & ~kv_seed_data_present;
       `else
@@ -371,9 +382,15 @@ always_comb mldsa_privkey_lock = '0;
 
     for (int dword=0; dword < MSG_NUM_DWORDS; dword++)begin
       msg_reg[dword] = mldsa_reg_hwif_out.MLDSA_MSG[MSG_NUM_DWORDS-1-dword].MSG.value;
+      `ifdef CALIPTRA
+      mldsa_reg_hwif_in.MLDSA_MSG[dword].MSG.we = pcr_sign_mode & !zeroize;
+      mldsa_reg_hwif_in.MLDSA_MSG[dword].MSG.next = pcr_signing_data.pcr_hash[dword];
+      mldsa_reg_hwif_in.MLDSA_MSG[dword].MSG.hwclr = zeroize;
+      `else
       mldsa_reg_hwif_in.MLDSA_MSG[dword].MSG.we = '0;
       mldsa_reg_hwif_in.MLDSA_MSG[dword].MSG.next = '0;
       mldsa_reg_hwif_in.MLDSA_MSG[dword].MSG.hwclr = zeroize;
+      `endif
     end
 
     for (int dword=0; dword < SIGN_RND_NUM_DWORDS; dword++)begin
@@ -988,7 +1005,12 @@ always_comb mldsa_privkey_lock = '0;
   always_comb subcomponent_busy = !(ctrl_fsm_ns inside {MLDSA_CTRL_IDLE, MLDSA_CTRL_MSG_WAIT}) |
                                   sampler_busy_i |
                                   ntt_busy_i[0];
+`ifdef CALIPTRA
+  always_comb pcr_sign_input_invalid = (cmd_reg inside {MLDSA_KEYGEN, MLDSA_SIGN, MLDSA_VERIFY}) & pcr_sign_mode;
+  always_comb error_flag = skdecode_error_i | pcr_sign_input_invalid;
+`else
   always_comb error_flag = skdecode_error_i;
+`endif                                  
 
   always_ff @(posedge clk or negedge rst_b) 
   begin : error_detection

src/mldsa_top/rtl/mldsa_reg.rdl

@@ -80,6 +80,7 @@ addrmap mldsa_reg {
         default resetsignal = reset_b;
         field {desc = "Control command field"; swwe = mldsa_ready; hwclr;} CTRL[3] = 3'b0;
         field {desc = "Zeroize all internal registers"; singlepulse;} ZEROIZE = 1'b0;
+        field {desc = "Run PCR Signing flow: Run MLDSA KeyGen+Signing flow to sign PCRs."; swwe = mldsa_ready; hwclr;} PCR_SIGN = 1'b0;
 
     } MLDSA_CTRL;
 

src/mldsa_top/rtl/mldsa_reg.sv

@@ -198,6 +198,10 @@ module mldsa_reg (
                 logic next;
                 logic load_next;
             } ZEROIZE;
+            struct packed{
+                logic next;
+                logic load_next;
+            } PCR_SIGN;
         } MLDSA_CTRL;
         struct packed{
             struct packed{
@@ -356,6 +360,9 @@ module mldsa_reg (
             struct packed{
                 logic value;
             } ZEROIZE;
+            struct packed{
+                logic value;
+            } PCR_SIGN;
         } MLDSA_CTRL;
         struct packed{
             struct packed{
@@ -522,6 +529,30 @@ module mldsa_reg (
         end
     end
     assign hwif_out.MLDSA_CTRL.ZEROIZE.value = field_storage.MLDSA_CTRL.ZEROIZE.value;
+    // Field: mldsa_reg.MLDSA_CTRL.PCR_SIGN
+    always_comb begin
+        automatic logic [0:0] next_c;
+        automatic logic load_next_c;
+        next_c = field_storage.MLDSA_CTRL.PCR_SIGN.value;
+        load_next_c = '0;
+        if(decoded_reg_strb.MLDSA_CTRL && decoded_req_is_wr && hwif_in.mldsa_ready) begin // SW write
+            next_c = (field_storage.MLDSA_CTRL.PCR_SIGN.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]);
+            load_next_c = '1;
+        end else if(hwif_in.MLDSA_CTRL.PCR_SIGN.hwclr) begin // HW Clear
+            next_c = '0;
+            load_next_c = '1;
+        end
+        field_combo.MLDSA_CTRL.PCR_SIGN.next = next_c;
+        field_combo.MLDSA_CTRL.PCR_SIGN.load_next = load_next_c;
+    end
+    always_ff @(posedge clk or negedge hwif_in.reset_b) begin
+        if(~hwif_in.reset_b) begin
+            field_storage.MLDSA_CTRL.PCR_SIGN.value <= 1'h0;
+        end else if(field_combo.MLDSA_CTRL.PCR_SIGN.load_next) begin
+            field_storage.MLDSA_CTRL.PCR_SIGN.value <= field_combo.MLDSA_CTRL.PCR_SIGN.next;
+        end
+    end
+    assign hwif_out.MLDSA_CTRL.PCR_SIGN.value = field_storage.MLDSA_CTRL.PCR_SIGN.value;
     for(genvar i0=0; i0<16; i0++) begin
         // Field: mldsa_reg.MLDSA_ENTROPY[].ENTROPY
         always_comb begin

src/mldsa_top/rtl/mldsa_reg_pkg.sv

@@ -26,8 +26,13 @@ package mldsa_reg_pkg;
         logic hwclr;
     } mldsa_reg__MLDSA_CTRL__CTRL__in_t;
 
+    typedef struct packed{
+        logic hwclr;
+    } mldsa_reg__MLDSA_CTRL__PCR_SIGN__in_t;
+
     typedef struct packed{
         mldsa_reg__MLDSA_CTRL__CTRL__in_t CTRL;
+        mldsa_reg__MLDSA_CTRL__PCR_SIGN__in_t PCR_SIGN;
     } mldsa_reg__MLDSA_CTRL__in_t;
 
     typedef struct packed{
@@ -192,9 +197,14 @@ package mldsa_reg_pkg;
         logic value;
     } mldsa_reg__MLDSA_CTRL__ZEROIZE__out_t;
 
+    typedef struct packed{
+        logic value;
+    } mldsa_reg__MLDSA_CTRL__PCR_SIGN__out_t;
+
     typedef struct packed{
         mldsa_reg__MLDSA_CTRL__CTRL__out_t CTRL;
         mldsa_reg__MLDSA_CTRL__ZEROIZE__out_t ZEROIZE;
+        mldsa_reg__MLDSA_CTRL__PCR_SIGN__out_t PCR_SIGN;
     } mldsa_reg__MLDSA_CTRL__out_t;
 
     typedef struct packed{

src/mldsa_top/rtl/mldsa_reg_uvm.sv

@@ -72,9 +72,11 @@ package mldsa_reg_uvm;
 
         mldsa_reg__MLDSA_CTRL_bit_cg CTRL_bit_cg[3];
         mldsa_reg__MLDSA_CTRL_bit_cg ZEROIZE_bit_cg[1];
+        mldsa_reg__MLDSA_CTRL_bit_cg PCR_SIGN_bit_cg[1];
         mldsa_reg__MLDSA_CTRL_fld_cg fld_cg;
         rand uvm_reg_field CTRL;
         rand uvm_reg_field ZEROIZE;
+        rand uvm_reg_field PCR_SIGN;
 
         function new(string name = "mldsa_reg__MLDSA_CTRL");
             super.new(name, 32, build_coverage(UVM_CVR_ALL));
@@ -90,9 +92,12 @@ package mldsa_reg_uvm;
             this.CTRL.configure(this, 3, 0, "WO", 1, 'h0, 1, 1, 0);
             this.ZEROIZE = new("ZEROIZE");
             this.ZEROIZE.configure(this, 1, 3, "WO", 0, 'h0, 1, 1, 0);
+            this.PCR_SIGN = new("PCR_SIGN");
+            this.PCR_SIGN.configure(this, 1, 4, "WO", 1, 'h0, 1, 1, 0);
             if (has_coverage(UVM_CVR_REG_BITS)) begin
                 foreach(CTRL_bit_cg[bt]) CTRL_bit_cg[bt] = new();
                 foreach(ZEROIZE_bit_cg[bt]) ZEROIZE_bit_cg[bt] = new();
+                foreach(PCR_SIGN_bit_cg[bt]) PCR_SIGN_bit_cg[bt] = new();
             end
             if (has_coverage(UVM_CVR_FIELD_VALS))
                 fld_cg = new();

src/mldsa_top/rtl/mldsa_top.sv

@@ -64,6 +64,8 @@ module mldsa_top
   // KV interface
   output kv_read_t kv_read,
   input kv_rd_resp_t kv_rd_resp,
+  //PCR Signing
+  input pcr_signing_t pcr_signing_data,
   `endif
 
   output logic                      error_intr,