Skip to content
Nightly Release

Nightly Release #366

Sign in to view logs

Nightly Release

Nightly Release #366

Run time

Learn about OS pricing on GitHub Actions
Job Run time
RTL Repo Sync / Update RTL Submodule
42s
Find Latest Release
25s
FPGA Suite (1.0, etrng, log) / check_cache
10s
FPGA Suite (1.0, etrng, log) / build_test_binaries
3m 16s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
3m 8s
FPGA Suite (1.0, itrng, log) / build_test_binaries
3m 25s
FPGA Suite (1.0, etrng, nolog) / check_cache
37s
FPGA Suite (1.0, itrng, log) / check_cache
10s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
3m 20s
FPGA Suite (1.0, itrng, nolog) / check_cache
10s
FPGA Suite (hw-latest, etrng, log) / check_cache
11s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
3m 22s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
4m 41s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
10s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
3m 19s
FPGA Suite (hw-latest, itrng, log) / check_cache
14s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
4m 37s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
18s
sw-emulator Suite (etrng, log) / build_and_test
19m 22s
sw-emulator Suite (etrng, nolog) / build_and_test
18m 55s
sw-emulator Suite (itrng, log) / build_and_test
19m 49s
sw-emulator Suite (itrng, nolog) / build_and_test
19m 29s
sw-emulator Suite (etrng, log) / build_and_test
19m 26s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 14s
sw-emulator Suite (itrng, log) / build_and_test
19m 26s
sw-emulator Suite (itrng, nolog) / build_and_test
19m 1s
FPGA Suite (1.0, etrng, log) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / test_artifacts
55m 54s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
55m 25s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
55m 46s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
45m 16s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
47m 17s
FPGA Suite (1.0, itrng, log) / test_artifacts
56m 23s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
40m 49s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
42m 25s
Create New Release
3m 37s
Publish https://caliptra-sw.github.io/ / build
2m 43s
Publish https://caliptra-sw.github.io/ / deploy
9s
9h 52m 41s