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Nightly Release

Nightly Release #375

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Nightly Release

Nightly Release #375

Triggered via schedule August 17, 2024 10:17
@JohnTraverAmdJohnTraverAmd
⁠ c4f548a
main
Status Failure
Total duration 55s
Artifacts –

nightly-release.yml

on: schedule
RTL Repo Sync  /  Update RTL Submodule
37s
RTL Repo Sync / Update RTL Submodule
Find Latest Release
0s
Find Latest Release
FPGA Suite (1.0, etrng, log)  /  check_cache
FPGA Suite (1.0, etrng, log) / check_cache
FPGA Suite (1.0, etrng, nolog)  /  check_cache
FPGA Suite (1.0, etrng, nolog) / check_cache
FPGA Suite (1.0, itrng, log)  /  check_cache
FPGA Suite (1.0, itrng, log) / check_cache
FPGA Suite (1.0, itrng, nolog)  /  check_cache
FPGA Suite (1.0, itrng, nolog) / check_cache
FPGA Suite (hw-latest, etrng, log)  /  check_cache
FPGA Suite (hw-latest, etrng, log) / check_cache
FPGA Suite (hw-latest, etrng, nolog)  /  check_cache
FPGA Suite (hw-latest, etrng, nolog) / check_cache
FPGA Suite (hw-latest, itrng, log)  /  check_cache
FPGA Suite (hw-latest, itrng, log) / check_cache
FPGA Suite (hw-latest, itrng, nolog)  /  check_cache
FPGA Suite (hw-latest, itrng, nolog) / check_cache
sw-emulator Suite (etrng, log)  /  build_and_test
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, log)  /  build_and_test
sw-emulator Suite (etrng, log) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (etrng, nolog)  /  build_and_test
sw-emulator Suite (etrng, nolog) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, log)  /  build_and_test
sw-emulator Suite (itrng, log) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
sw-emulator Suite (itrng, nolog) / build_and_test
sw-emulator Suite (itrng, nolog)  /  build_and_test
sw-emulator Suite (itrng, nolog) / build_and_test
FPGA Suite (1.0, etrng, log)  /  build_test_binaries
FPGA Suite (1.0, etrng, log) / build_test_binaries
FPGA Suite (1.0, etrng, nolog)  /  build_test_binaries
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
FPGA Suite (1.0, itrng, log)  /  build_test_binaries
FPGA Suite (1.0, itrng, log) / build_test_binaries
FPGA Suite (1.0, itrng, nolog)  /  build_test_binaries
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
FPGA Suite (hw-latest, etrng, log)  /  build_test_binaries
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
FPGA Suite (hw-latest, etrng, nolog)  /  build_test_binaries
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
FPGA Suite (hw-latest, itrng, log)  /  build_test_binaries
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
FPGA Suite (hw-latest, itrng, nolog)  /  build_test_binaries
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
FPGA Suite (1.0, etrng, log)  /  build_bitstream
FPGA Suite (1.0, etrng, log) / build_bitstream
FPGA Suite (1.0, etrng, log)  /  build_kernel_modules
FPGA Suite (1.0, etrng, log) / build_kernel_modules
FPGA Suite (1.0, etrng, nolog)  /  build_bitstream
FPGA Suite (1.0, etrng, nolog) / build_bitstream
FPGA Suite (1.0, etrng, nolog)  /  build_kernel_modules
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
FPGA Suite (1.0, itrng, log)  /  build_bitstream
FPGA Suite (1.0, itrng, log) / build_bitstream
FPGA Suite (1.0, itrng, log)  /  build_kernel_modules
FPGA Suite (1.0, itrng, log) / build_kernel_modules
FPGA Suite (1.0, itrng, nolog)  /  build_bitstream
FPGA Suite (1.0, itrng, nolog) / build_bitstream
FPGA Suite (1.0, itrng, nolog)  /  build_kernel_modules
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
FPGA Suite (hw-latest, etrng, log)  /  build_bitstream
FPGA Suite (hw-latest, etrng, log) / build_bitstream
FPGA Suite (hw-latest, etrng, log)  /  build_kernel_modules
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
FPGA Suite (hw-latest, etrng, nolog)  /  build_bitstream
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
FPGA Suite (hw-latest, etrng, nolog)  /  build_kernel_modules
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
FPGA Suite (hw-latest, itrng, log)  /  build_bitstream
FPGA Suite (hw-latest, itrng, log) / build_bitstream
FPGA Suite (hw-latest, itrng, log)  /  build_kernel_modules
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
FPGA Suite (hw-latest, itrng, nolog)  /  build_bitstream
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
FPGA Suite (hw-latest, itrng, nolog)  /  build_kernel_modules
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
FPGA Suite (1.0, etrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, log)  /  test_artifacts
FPGA Suite (1.0, etrng, log) / test_artifacts
FPGA Suite (1.0, etrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, etrng, nolog)  /  test_artifacts
FPGA Suite (1.0, etrng, nolog) / test_artifacts
FPGA Suite (1.0, itrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, log)  /  test_artifacts
FPGA Suite (1.0, itrng, log) / test_artifacts
FPGA Suite (1.0, itrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (1.0, itrng, nolog)  /  test_artifacts
FPGA Suite (1.0, itrng, nolog) / test_artifacts
FPGA Suite (hw-latest, etrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, log)  /  test_artifacts
FPGA Suite (hw-latest, etrng, log) / test_artifacts
FPGA Suite (hw-latest, etrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, etrng, nolog)  /  test_artifacts
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
FPGA Suite (hw-latest, itrng, log)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, log)  /  test_artifacts
FPGA Suite (hw-latest, itrng, log) / test_artifacts
FPGA Suite (hw-latest, itrng, nolog)  /  cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
FPGA Suite (hw-latest, itrng, nolog)  /  test_artifacts
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
Create New Release
0s
Create New Release
Publish https://caliptra-sw.github.io/  /  build
Publish https://caliptra-sw.github.io/ / build
Publish https://caliptra-sw.github.io/  /  deploy
Publish https://caliptra-sw.github.io/ / deploy
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1 error and 1 warning
RTL Repo Sync / Update RTL Submodule
Unhandled error: HttpError: GitHub Actions is not permitted to create or approve pull requests.
RTL Repo Sync / Update RTL Submodule
The following actions use a deprecated Node.js version and will be forced to run on node20: actions/checkout@v3, actions/github-script@v6. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/