Skip to content
Nightly Release

Nightly Release #539

Sign in to view logs

Nightly Release

Nightly Release #539

Run time

Learn about OS pricing on GitHub Actions
Job Run time
Find Latest Release
32s
FPGA Suite (1.0, etrng, nolog) / check_cache
19s
FPGA Suite (1.0, etrng, log) / build_test_binaries
3m 34s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
5m 4s
FPGA Suite (1.0, etrng, log) / check_cache
12s
FPGA Suite (1.0, itrng, log) / build_test_binaries
5m 3s
FPGA Suite (1.0, itrng, log) / check_cache
13s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
4m 49s
FPGA Suite (1.0, itrng, nolog) / check_cache
12s
FPGA Suite (1.1, etrng, log) / check_cache
12s
FPGA Suite (1.1, etrng, log) / build_test_binaries
5m 14s
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
4m 50s
FPGA Suite (1.1, etrng, nolog) / check_cache
12s
FPGA Suite (1.1, itrng, log) / build_test_binaries
5m 2s
FPGA Suite (1.1, itrng, log) / check_cache
10s
FPGA Suite (1.1, itrng, nolog) / check_cache
12s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
5m 20s
FPGA Suite (hw-latest, etrng, log) / check_cache
11s
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
4m 59s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
5m 22s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
20s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
5m 13s
FPGA Suite (hw-latest, itrng, log) / check_cache
11s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
1s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
9s
sw-emulator Suite (etrng, log) / build_and_test
21m 23s
sw-emulator Suite (etrng, log) / build_and_test
20m 48s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 24s
sw-emulator Suite (itrng, log) / build_and_test
21m 21s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 22s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 23s
sw-emulator Suite (itrng, nolog) / build_and_test
21m 19s
sw-emulator Suite (itrng, log) / build_and_test
21m 14s
sw-emulator Suite (etrng, log) / build_and_test
21m 6s
sw-emulator Suite (etrng, nolog) / build_and_test
19m 50s
sw-emulator Suite (itrng, log) / build_and_test
20m 57s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 37s
FPGA Suite (1.1, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, itrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, log) / build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, etrng, log) / test_artifacts
1h 1m 17s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
1h 1m 7s
FPGA Suite (1.1, etrng, nolog) / test_artifacts
46m 17s
FPGA Suite (1.1, itrng, nolog) / test_artifacts
48m 3s
FPGA Suite (1.0, itrng, log) / test_artifacts
58m 56s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
57m 7s
FPGA Suite (1.1, itrng, log) / test_artifacts
47m 40s
FPGA Suite (1.1, etrng, log) / test_artifacts
46m 36s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
47m 29s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
46m 24s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
45m 48s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
0s
Create New Release
0s
Publish https://caliptra-sw.github.io/
0s
14h 34m 4s