From 9aacda2485d7c3d165b39bfe4f4ac733f3f48392 Mon Sep 17 00:00:00 2001
From: Christopher Swenson <chswenson@microsoft.com>
Date: Mon, 3 Feb 2025 14:32:53 -0800
Subject: [PATCH] Clippy fix and fmt

---
 .../lib/periph/src/dma/axi_root_bus.rs        | 35 ++++++++-----------
 sw-emulator/lib/periph/src/dma/recovery.rs    |  2 +-
 sw-emulator/lib/periph/src/root_bus.rs        |  4 +--
 3 files changed, 18 insertions(+), 23 deletions(-)

diff --git a/sw-emulator/lib/periph/src/dma/axi_root_bus.rs b/sw-emulator/lib/periph/src/dma/axi_root_bus.rs
index 81712a287f..83ab408961 100644
--- a/sw-emulator/lib/periph/src/dma/axi_root_bus.rs
+++ b/sw-emulator/lib/periph/src/dma/axi_root_bus.rs
@@ -61,10 +61,7 @@ impl AxiRootBus {
     }
 
     pub fn must_schedule(&mut self, addr: AxiAddr) -> bool {
-        match addr {
-            Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END => true,
-            _ => false,
-        }
+        matches!(addr, Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END)
     }
 
     pub fn schedule_read(&mut self, addr: AxiAddr, len: u32) -> Result<(), BusError> {
@@ -74,7 +71,7 @@ impl AxiRootBus {
         }
         match addr {
             Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END => {
-                self.event_sender.as_mut().map(|sender| {
+                if let Some(sender) = self.event_sender.as_mut() {
                     sender
                         .send(Event::new(
                             Device::CaliptraCore,
@@ -85,7 +82,7 @@ impl AxiRootBus {
                             },
                         ))
                         .unwrap();
-                });
+                }
                 Ok(())
             }
             _ => Err(BusError::LoadAccessFault),
@@ -111,13 +108,13 @@ impl AxiRootBus {
 
     pub fn write(&mut self, size: RvSize, addr: AxiAddr, val: RvData) -> Result<(), BusError> {
         match addr {
-            Self::TEST_REG_OFFSET => return Register::write(&mut self.reg, size, val),
+            Self::TEST_REG_OFFSET => Register::write(&mut self.reg, size, val),
             Self::RECOVERY_REGISTER_INTERFACE_OFFSET..=Self::RECOVERY_REGISTER_INTERFACE_END => {
                 let addr = (addr - Self::RECOVERY_REGISTER_INTERFACE_OFFSET) as RvAddr;
                 Bus::write(&mut self.recovery, size, addr, val)
             }
             Self::MCU_SRAM_OFFSET..=Self::MCU_SRAM_END => {
-                self.event_sender.as_mut().map(|sender| {
+                if let Some(sender) = self.event_sender.as_mut() {
                     sender
                         .send(Event::new(
                             Device::CaliptraCore,
@@ -128,12 +125,12 @@ impl AxiRootBus {
                             },
                         ))
                         .unwrap();
-                });
+                }
                 Ok(())
             }
             Self::OTC_FC_OFFSET..=Self::OTC_FC_END => {
                 let addr = (addr - Self::OTC_FC_OFFSET) as RvAddr;
-                return Bus::write(&mut self.otp_fc, size, addr, val);
+                Bus::write(&mut self.otp_fc, size, addr, val)
             }
             _ => Err(StoreAccessFault),
         }
@@ -141,17 +138,15 @@ impl AxiRootBus {
 
     pub fn incoming_event(&mut self, event: Rc<Event>) {
         self.recovery.incoming_event(event.clone());
-        match &event.event {
-            EventData::MemoryReadResponse {
-                start_addr: _,
-                data,
-            } => {
-                // we only access read responses from the MCU
-                if event.src == Device::MCU {
-                    self.dma_result = Some(data.clone());
-                }
+        if let EventData::MemoryReadResponse {
+            start_addr: _,
+            data,
+        } = &event.event
+        {
+            // we only access read responses from the MCU
+            if event.src == Device::MCU {
+                self.dma_result = Some(data.clone());
             }
-            _ => {}
         }
     }
 
diff --git a/sw-emulator/lib/periph/src/dma/recovery.rs b/sw-emulator/lib/periph/src/dma/recovery.rs
index 0637accdae..58132541c2 100644
--- a/sw-emulator/lib/periph/src/dma/recovery.rs
+++ b/sw-emulator/lib/periph/src/dma/recovery.rs
@@ -409,7 +409,7 @@ impl RecoveryRegisterInterface {
 fn to_payload(data: &[u32], len: usize) -> Option<Vec<u8>> {
     Some(
         data.iter()
-            .flat_map(|x| x.to_le_bytes().iter().copied().collect::<Vec<u8>>())
+            .flat_map(|x| x.to_le_bytes().to_vec())
             .take(len)
             .collect(),
     )
diff --git a/sw-emulator/lib/periph/src/root_bus.rs b/sw-emulator/lib/periph/src/root_bus.rs
index 80ce51e329..430f26f5bf 100644
--- a/sw-emulator/lib/periph/src/root_bus.rs
+++ b/sw-emulator/lib/periph/src/root_bus.rs
@@ -385,7 +385,7 @@ impl CaliptraRootBus {
         self.sha512_acc.incoming_event(event.clone());
         self.dma.incoming_event(event.clone());
         self.csrng.incoming_event(event.clone());
-        self.pic_regs.incoming_event(event.clone());
+        self.pic_regs.incoming_event(event);
     }
 
     fn register_outgoing_events(&mut self, sender: mpsc::Sender<Event>) {
@@ -408,7 +408,7 @@ impl CaliptraRootBus {
         self.sha512_acc.register_outgoing_events(sender.clone());
         self.dma.register_outgoing_events(sender.clone());
         self.csrng.register_outgoing_events(sender.clone());
-        self.pic_regs.register_outgoing_events(sender.clone());
+        self.pic_regs.register_outgoing_events(sender);
     }
 }