Skip to content

Commit

Permalink
[test] Move tests off elaborateAndGetModule
Browse files Browse the repository at this point in the history
Switch from `elaborateAndGetModule` to new test-only `ChiselStage`
extension method.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
  • Loading branch information
seldridge committed Feb 26, 2025
1 parent b6cd32e commit a5c4f61
Show file tree
Hide file tree
Showing 3 changed files with 10 additions and 12 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,8 @@ import chisel3.experimental.dataview._
import chisel3.experimental.conversions._
import chisel3.experimental.annotate
import chiselTests.{ChiselFlatSpec, FileCheck}
import chiselTests.experimental.ExtensionMethods.ChiselStageHelpers
import circt.stage.ChiselStage

object DataViewTargetSpec {
import firrtl.annotations._
Expand Down Expand Up @@ -56,7 +58,7 @@ class DataViewTargetSpec extends ChiselFlatSpec with FileCheck {
val inst = Module(new MyChild)
out := inst.out
}
val m = elaborateAndGetModule(new MyParent)
val m = ChiselStage.getModule(new MyParent)
val outsideView = m.inst.out.viewAs[UInt]
checkSameAs(m.inst.out, m.inst.insideView, outsideView)
}
Expand All @@ -81,7 +83,7 @@ class DataViewTargetSpec extends ChiselFlatSpec with FileCheck {
val inst = Module(new MyChild)
out := inst.out
}
val m = elaborateAndGetModule(new MyParent)
val m = ChiselStage.getModule(new MyParent)
val outView = m.inst.out.viewAs[Vec[UInt]] // Note different type
val outFooView = m.inst.out.foo.viewAs[UInt]
val outBarsView = m.inst.out.bars.viewAs[Vec[UInt]]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ import chisel3._
import chisel3.experimental.{BaseModule, ExtModule}
import chisel3.experimental.dataview.DataProduct
import chiselTests.ChiselFlatSpec
import chiselTests.experimental.ExtensionMethods.ChiselStageHelpers
import circt.stage.ChiselStage

object ModuleDataProductSpec {
class MyBundle extends Bundle {
Expand Down Expand Up @@ -42,7 +44,7 @@ class ModuleDataProductSpec extends ChiselFlatSpec {
behavior.of("DataProduct")

it should "work for UserModules (recursively)" in {
val m = elaborateAndGetModule(new MyUserModule)
val m = ChiselStage.getModule(new MyUserModule)
val expected = Seq(
m.clock -> "m.clock",
m.reset -> "m.reset",
Expand Down Expand Up @@ -72,7 +74,7 @@ class ModuleDataProductSpec extends ChiselFlatSpec {
}

it should "work for (wrapped) ExtModules" in {
val m = elaborateAndGetModule(new MyExtModuleWrapper).inst
val m = ChiselStage.getModule(new MyExtModuleWrapper).inst
val expected = Seq(
m.in -> "m.in",
m.in.bar -> "m.in.bar",
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ package experimental.hierarchy
import chisel3._
import chisel3.experimental.BaseModule
import chisel3.experimental.hierarchy.{instantiable, public, Definition, Instance}
import chiselTests.experimental.ExtensionMethods.ChiselStageHelpers
import circt.stage.ChiselStage
import org.scalatest.funspec.AnyFunSpec
import org.scalatest.matchers.should.Matchers
Expand Down Expand Up @@ -303,14 +304,7 @@ class DefinitionSpec extends AnyFunSpec with Matchers with FileCheck {
}
describe("(2): Annotations on designs not in the same chisel compilation") {
// Extract the built `AddTwo` module for use in other tests.
val first = {
var result: AddTwo = null
ChiselStage.emitCHIRRTL {
result = new AddTwo
result
}
result
}
val first = ChiselStage.getModule(new AddTwo)
it("(2.a): should work on an innerWire, marked in a different compilation") {
class Top(x: AddTwo) extends Module {
val parent = Definition(new ViewerParent(x, false, true))
Expand Down

0 comments on commit a5c4f61

Please sign in to comment.