Chisel v6.0.0-M2

Features

• Add Top-level parameterized reset type (by @mwachs5 in #3276)
  Add a HasParameterizedResetType to mix into Modules for their top level .reset
• Allow out-of-package svsim backend implementations (by @GeorgeLyon in #3306)
  • Allow users of chisel to specify their own svsim.Backend implementations outside of Chisel. This is useful since in-tree backends may not support all versions of the specified backend (and we don't necessarily want them to).
• Support ref types on interfaces (by @trilorez in #3301)
• Fix color emission to check for interactive terminal (by @jackkoenig in #3334)
  • Chisel will now detect when it should print warnings, errors, and deprecations in color.
  • Color can be controlled with environment variable CHISEL_USE_COLOR. Set to true to force Chisel to use color and false to disable it.
  • Due to how the JVM works, detection requires interactive stdout, stderr, and stdin. Build tools like SBT virtualize stdin and thus color will be disabled by default when running a Chisel main with SBT. Detection also requires environment variable TERM to be set to something other than dumb.
• Unify recursive Data traversals into DataMirror (by @jared-barocsi in #3300)
• Add support for Instantiate for BlackBox, ExtModule, and IntrinsicModule (by @jackkoenig in #3349)
• Add support for zero-width bit extraction (by @jackkoenig in #3352)
• Add basic linear temporal logic assertions (by @fabianschuiki in #3337)
• Implement a SyncReadMem wrapper with explicit read, write, and read/write ports (by @jared-barocsi in #3228)
  This SyncReadMem wrapper is instantiated using a new object, SRAM.apply, and invokes .write, .read, and .readWrite to generate a desired number of read, write, and read/write ports. This function returns a new Bundle wire containing the control signals for each requested port.

API Modification

• Create "tap" API for boring probe-type (non-synthesizable) ports (by @debs-sifive in #3237)
  Create "tap" API for boring probe-type (non-synthesizable) ports.
• BoringUtils writable tap (rwTap) API (by @debs-sifive in #3284)
  Add writable tap (rwTap) API to BoringUtils, which drills writable probe ports downwards only.
• Remove support for Scala 2.12 (by @jackkoenig in #3331)
  Chisel 5 was the last major version supporting Scala 2.12, please upgrade to Scala 2.13.

API Deprecation

• Warn on incorrect widths for Vec dynamic indexing (by @jackkoenig in #3321)

Backend Code Generation

• [codegen] Simpler FIRRTL Code for Reg w/o Reset (by @seldridge in #3280)

Performance

• Optimize BitPat equals, overlap, and cover (by @jackkoenig in #3285)
• Convert Vec dynamic index with a literal to static index (by @jackkoenig in #3314)

Fixes

• Gate sys/personality.h include under define (by @trilorez in #3307)
• Make svsim shutdown gracefully when the test throws an exception (by @GeorgeLyon in #3309)
  • Fixed an issue where throwing an assert from an svsim simulation run may kill the simulated process before it can finish writing a waveform.
• Don't emit implicit clock warnings for SyncReadMem.readWrite when explicit clocks are used (by @jared-barocsi in #3313)
• Report Builder errors even when exception is thrown (by @jackkoenig in #3341)
  Chisel will report multiple errors, but this can be cut short by any thrown Exception which would then take precedence over the previously encountered errors. Now Chisel will prioritize reporting errors even if an Exception is thrown.
• Support linking ref types on interfaces (by @trilorez in #3326)

Documentation

• [docs] Update website for 5.0, 6.0 and fix links (by @jackkoenig in #3274)
• Update roadmap. (by @gonsolo in #3295)
• Bring ToC and Menu into alignment, some minor cleanup within docs (by @mwachs5 in #3346)
  Fix #3322
• Remove references to interval types from the website docs (by @mwachs5 in #3345)
  Fixes #3325
• Update meeting time and versions in README (by @jackkoenig in #3356)

Dependency Updates

• Update scalacheck-1-15 to 3.2.14.0 (by @scala-steward in #3265)
• Update scalatest to 3.2.16 (by @scala-steward in #3299)
• Update sbt to 1.8.3 (by @scala-steward in #3298)
• Add Scala 2.13.11 and 2.12.18 to plugin cross versions (by @jackkoenig in #3327)
• Bump to firtool 1.43.0 (by @jackkoenig in #3332)
  See release notes for firtool 1.41.0, 1.42.0, and 1.43.0.
• Bump to Scala 2.13.11 (by @jackkoenig in #3358)

Build and Internal Changes

• SemanticDB requires private fields of case class to use "val" (by @jackkoenig in #3270)
• Update PULL_REQUEST_TEMPLATE.md (by @mwachs5 in #3279)
  Update PR template to be less comment-driven
• [CI] Update versions in CI Workflow (by @jackkoenig in #3291)
• Update ChiselRunners to use svsim (by @GeorgeLyon in #3147)
  • All ChiselRunner tests now use svsim when calling assertTester{Passes,Fails}
• Add tests for using DataView with ref types (by @trilorez in #3320)
• Update sbt to 1.9.0 (by @scala-steward in #3339)
• Update sbt-scalafix to 0.11.0 (by @scala-steward in #3338)
• Make devcontainer point to CIRCT top-of-tree instead of latest release (by @GeorgeLyon in #3360)
  • VSCode devcontainer now follows CIRCT top-of-tree rather than latest release

Full Changelog: v6.0.0-M1...v6.0.0-M2