Chisel v7.0.0-M1

Features

• Support checking isVisible with reflect.DataMirror (by @poemonsense in #3753)
• Add Layer Colors to Probe Types (by @seldridge in #3744)
• Add DataMirror.getLayerColor (by @seldridge in #3765)
• Provide ImplicitClock and ImplicitReset (by @jackkoenig in #3714)
  These traits implement the functionality formerly only implemented in Module such that they can now be used by RawModules. They also define new protected virtual methods implicitClock and implicitReset that can be overridden within Module to change what values are used as the implicit clock and implicit reset respectively.
• Support isLit for Property types. (by @mikeurbach in #3782)
  Since we override litOption to always be None, we need to override isLit to check the Binding.
• Support isProperty query in DataMirror. (by @mikeurbach in #3783)
  This adds an API to DataMirror to query if a Data is a Property.
• Support Property in BoringUtils. (by @mikeurbach in #3784)
  This adds support for BoringUtils.bore to bore and connect Property ports.
• Add a new DynamicObject.apply method to create Class instances. (by @mikeurbach in #3792)
  This is in addition to the existing support in Definition.apply. Sometimes it is not possible to use Definition.apply, for example, if you plan to bore ports through the Class being constructed. The new DynamicObject.apply method supports this, and creates a DynamicObject from the newly elaborated Class.
• Allow modules to globally enable layers (by @seldridge in #3799)
• Add Public trait to create public FIRRTL modules (by @seldridge in #3813)
• Make SRAMInterface parameters publicly available (by @debs-sifive in #3826)
  memSize, dataType, numReadPorts, numWritePorts, numReadwritePorts, masked parameters are now visible for SRAMInterface.
• Add Property expressions, starting with addition. (by @mikeurbach in #3810)
  This allows Properties to be used to build up expressions in terms of input Properties and literals.
• Add Property expression for integer multiplication. (by @mikeurbach in #3844)
  This adds an API for integer Property multiplication.
• Add Property expression for integer shift right. (by @mikeurbach in #3846)
  This adds an API for integer Property shift right.
• Add DataProduct for Iterables and primitive types (by @jackkoenig in #3856)

API Modification

• Refactor panama binding and converter framwork (by @sequencer in #3754)
• Change the width of static shift right (by @jackkoenig in #3824)
  • A UInt shifted right by a static amount >= its width will now result
    in a 0-bit UInt
  • An SInt shifted right by a static amount >= its width will now result
    in a 1-bit SInt (the sign bit)
    This is a change for SInts which Chisel would treat the output as a 0-bit SInt. However, FIRRTL implemented different behavior where both UInts and SInts would result in 1-bit values (which shifted right by an amount >= the width of the input).
    Users can emulate the old behavior by providing CLI option --use-legacy-shift-right-width. Users are encouraged to generate Verilog with and without this option and diff it to ensure the width change does not affect the correctness of their design. Note that this option is purely for code migration and should not be used long term--it will eventually be removed.
• Bump to firtool-resolver 2.0.0 (by @jackkoenig in #3855)
  This change should be non-breaking for the vast majority of users; however, it does have a substantial impact on Chisel's transitive dependencies which could affect some users. The following transitive dependencies were dropped:
  • com.github.luben:zstd-jni:1.5.5-10
  • com.github.plokhotnyuk.jsoniter-scala::jsoniter-scala-core:2.13.5.2
  • com.lihaoyi::sourcecode:0.3.1
  • com.outr::moduload:1.1.7
  • com.outr::perfolation:1.2.9
  • com.outr::scribe:3.13.0
  • commons-io:commons-io:2.15.0
  • io.get-coursier.jniutils:windows-jni-utils:0.3.3
  • io.get-coursier::coursier-cache:2.1.8
  • io.get-coursier::coursier-core:2.1.8
  • io.get-coursier::coursier-proxy-setup:2.1.8
  • io.get-coursier::coursier-util:2.1.8
  • io.get-coursier::coursier:2.1.8
  • io.github.alexarchambault.windows-ansi:windows-ansi:0.0.5
  • io.github.alexarchambault:concurrent-reference-hash-map:1.1.0
  • javax.inject:javax.inject:1
  • org.apache.commons:commons-compress:1.24.0
  • org.apache.xbean:xbean-reflect:3.7
  • org.codehaus.plexus:plexus-archiver:4.9.0
  • org.codehaus.plexus:plexus-classworlds:2.6.0
  • org.codehaus.plexus:plexus-container-default:2.1.1
  • org.codehaus.plexus:plexus-io:3.4.1
  • org.codehaus.plexus:plexus-utils:4.0.0
  • org.fusesource.jansi:jansi:1.18
  • org.iq80.snappy:snappy:0.4
  • org.slf4j:slf4j-api:1.7.36
  • org.tukaani:xz:1.9
  • org.virtuslab.scala-cli::config:0.2.1
    Any users experiencing issues should consider manually adding whichever of these dependencies they may be relying on.

Backend Code Generation

• Bump to FIRRTL 4.0.0 (by @seldridge in #3803)
• Add format strings to assert and assume (by @uenoku in #3802)
  This supports format strings for assert and assume statements as proposed in chipsalliance/firrtl-spec#166. This change might break existing code if message contains %.

Fixes

• Support === on empty Aggregates (by @jackkoenig in #3747)
• Shift right produce at least 1 bit width result (by @SpriteOvO in #3752)
• Fix Reg() to properly handle clocks as rvalues (by @jackkoenig in #3775)
  • Clocks are now properly supported by DataView (including FlatIO)
  • Users will also received better error messages when providing invalid clocks to Reg()
• Report source locator in when scoping error messages (by @jackkoenig in #3804)
• Fix visibility for views (by @jackkoenig in #3818)
  DataMirror.isVisible and other things checking visibility now work properly for views.
• [svsim] Better error message when verilator not on PATH (by @jackkoenig in #3829)
• Remove extra bit from SRAMInterface address width (by @debs-sifive in #3830)
• [svsim] Make EphemeralSimulator multi-processing friendly (by @jackkoenig in #3847)
  • Grab a unique temporary directory for every invocation using Java API
  • Allow multiple EphemeralSimulators to run in the same JVM (no longer necessary to single-thread)
  • Use pure Scala code to recursively delete directory at end rather than platform specific rm -rf
• Relax legality of defines, align with FIRRTL spec (by @seldridge in #3857)

Documentation

• [docs] Minor updates to README and SETUP for Chisel 6 (by @jackkoenig in #3745)
• [website] Make links more obvious (by @jackkoenig in #3755)
• [website] Write new Installation doc (by @jackkoenig in #3756)
  Revamps the website's instructions for "Getting Started".
• Homebrew sbt for MacOS (by @schoeberl in #3762)
• [docs] Remove SETUP.md in favor of website Installation page (by @jackkoenig in #3764)
• [docs] Make Quickstart instructions more clear (by @jackkoenig in #3774)
• Update CONTRIBUTING.md (by @mwachs5 in #3785)
  Update CONTRIBUTING instructions to clarify backport process and branch to target.
• [docs] Generate ToC for Cookbooks (by @jackkoenig in #3781)
• Add SoC-Now to community projects. (by @shahzaibk23 in #3805)
  Added SoC-Now Framework to community projects.
• [docs] Minor updates to developer docs (by @jackkoenig in #3815)
• [docs] Update Connectable explanation (by @tymcauley in #3664)

Dependency Updates

• [cd] Bump CIRCT from firtool-1.62.0 to firtool-1.63.0 (by @chiselbot in #3760)
• [cd] Bump CIRCT from firtool-1.63.0 to firtool-1.64.0 (by @chiselbot in #3800)
• [cd] Bump CIRCT from firtool-1.64.0 to firtool-1.65.0 (by @chiselbot in #3811)
• [cd] Bump CIRCT from firtool-1.65.0 to firtool-1.66.0 (by @chiselbot in #3831)
• de-bump to sbt 1.9.7 (by @debs-sifive in #3852)
  De-bumping to sbt 1.9.7 to avoid glibc issues for users, manifesting as:

  java.lang.UnsatisfiedLinkError: Error looking up function 'stat': java: undefined symbol: stat
  

• Add Scala 2.13.13 to cross-build (by @jackkoenig in #3851)

Build and Internal Changes

• [main] Enable MiMa for v6.0.0 (by @chiselbot in #3743)
• Enhance release notes automation (by @jackkoenig in #3751)
  • Bump mikepenz/release-changelog-builder-action to v4.1.1
  • It now tabs every line included in the Release Notes section of the PR template
• a Pure LLVM Lit test framework (by @sequencer in #3596)
• Update Scala CLI Template (by @jackkoenig in #3757)
  • Use "dep" instead of deprecated "lib"
  • Move ChiselStage import above import chisel3._
    • This makes users less likely to run into issues adding import chisel3.util._
  • Bump versions in Github workflows
• Add OM test, support iterating fields of a OM object (by @SpriteOvO in #3766)
• Implement FirtoolOptions for PanamaBinding (by @sequencer in #3773)
• Remove Makefile (by @seldridge in #3814)
• Add mlirBytecodeStream to PanamaCIRCT (by @SpriteOvO in #3823)

Full Changelog: v6.0.0...v7.0.0-M1