Fix rv32b

Author: jerryz123

Diff for: src/main/scala/rocket/ALU.scala

@@ -135,7 +135,7 @@ class ALU(implicit p: Parameters) extends AbstractALU()(p) {
   ))
   val popc_in = Mux(io.in2(1),
     Mux(io.dw === DW_32, io.in1(31,0), io.in1),
-    PriorityEncoderOH(1.U ## tz_in) - 1.U)
+    PriorityEncoderOH(1.U ## tz_in) - 1.U)(xLen-1,0)
   val count = PopCount(popc_in)
   val in1_bytes = io.in1.asTypeOf(Vec(xLen / 8, UInt(8.W)))
   val orcb = VecInit(in1_bytes.map(b => Fill(8, b =/= 0.U))).asUInt
@@ -152,7 +152,7 @@ class ALU(implicit p: Parameters) extends AbstractALU()(p) {
   val maxmin_out = Mux(io.cmp_out, io.in2, io.in1)
 
   // ROL, ROR
-  val rot_shamt = Mux(io.dw === DW_32, 32.U, 64.U) - shamt
+  val rot_shamt = Mux(io.dw === DW_32, 32.U, xLen.U) - shamt
   val rotin = Mux(io.fn(0), shin_r, Reverse(shin_r))
   val rotout_r = (rotin >> rot_shamt)(xLen-1,0)
   val rotout_l = Reverse(rotout_r)

Diff for: src/main/scala/rocket/IDecode.scala

@@ -480,7 +480,6 @@ class ZbbDecode(implicit val p: Parameters) extends DecodeConstants
     ROL      -> List(Y,N,N,N,N,N,Y,Y,A2_RS2   ,A1_RS1,IMM_X,DW_XPR,FN_ROL,   N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
     ROR      -> List(Y,N,N,N,N,N,Y,Y,A2_RS2   ,A1_RS1,IMM_X,DW_XPR,FN_ROR,   N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
     RORI     -> List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_ROR,   N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
-    ZEXT_H   -> List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_UNARY, N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
     SEXT_B   -> List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_UNARY, N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
     SEXT_H   -> List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_UNARY, N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
   )
@@ -496,15 +495,17 @@ class Zbb64Decode(implicit val p: Parameters) extends DecodeConstants
     ROLW     -> List(Y,N,N,N,N,N,Y,Y,A2_RS2   ,A1_RS1,IMM_X,DW_32 ,FN_ROL,   N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
     RORW     -> List(Y,N,N,N,N,N,Y,Y,A2_RS2   ,A1_RS1,IMM_X,DW_32 ,FN_ROR,   N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
     RORIW    -> List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_32 ,FN_ROR,   N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
+    ZEXT_H   -> List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_UNARY, N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
   )
 }
 
-
 class Zbb32Decode(implicit val p: Parameters) extends DecodeConstants
 {
   val table: Array[(BitPat, List[BitPat])] = Array(
     Instructions32.REV8     ->
                 List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_UNARY, N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
+    Instructions32.ZEXT_H   ->
+                List(Y,N,N,N,N,N,N,Y,A2_IMM   ,A1_RS1,IMM_I,DW_XPR,FN_UNARY, N,M_X,        N,N,N,N,N,N,Y,CSR.N,N,N,N,N),
   )
 }
 
@@ -522,8 +523,6 @@ class ZbsDecode(implicit val p: Parameters) extends DecodeConstants
   )
 }
 
-
-
 class RoCCDecode(implicit val p: Parameters) extends DecodeConstants
 {
   val table: Array[(BitPat, List[BitPat])] = Array(