Compile Wave Trace

RTL bug fix backport from Async Mem #1498

Sign in to view logs

Triggered via pull request February 26, 2025 21:43

sequencer

opened #980

async-mem-rtl-backport

Status Success

Total duration 1h 9m 55s

Artifacts –

trace.yml

on: pull_request

[T1EMU] Generate test plan

[T1EMU] Generate test plan

[T1ROCKETEMU] Generate test plan

[T1ROCKETEMU] Generate test plan

Matrix: [T1EMU] Build VCS trace emulators

Matrix: [T1EMU] Build verilator trace emulators

Matrix: [T1RocketEMU] Build VCS trace emulators

Matrix: [T1RocketEmu] Build verilator trace emulators