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ghcb: Use APIC ID List NAE event to get APIC IDs #625

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AdamCDunlap
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The GHCB protocol includes an NAE to get the list of APIC IDs for the guest, so use it on SEV-SNP. Previously, the list of APIC IDs was either gotten via ACPI table or using IGVM to get the number of vCPUs and assuming the APIC IDs were sequential. This is still done if the platform is not SNP since other platforms do not provide a way to get this list.

Fixes #623

The GHCB protocol includes an NAE to get the list of APIC IDs for the
guest, so use it on SEV-SNP. Previously, the list of APIC IDs was either
gotten via ACPI table or using IGVM to get the number of vCPUs and
assuming the APIC IDs were sequential. This is still done if the
platform is not SNP since other platforms do not provide a way to get
this list.

Signed-off-by: Adam Dunlap <acdunlap@google.com>
@msft-jlange
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This change doesn't work on TDX because it uses an SNP-specific GHCB protocol. It is possible to solve this in a cross-platform way using the MADT, and I just posted #626 to do exactly this. If this doesn't work correctly on QEMU, then a better approach would be to use FwCfg on QEMU builds to obtain the MADT and extract APIC IDs that way. I'm prepared to update my PR if required. I would strongly prefer to avoid any SNP-specific logic since a cross-platform technique is available.

@AdamCDunlap
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Superceded by #626

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SVSM assumes APIC IDs are sequential and fails to boot if there are gaps
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