diff --git a/Project.toml b/Project.toml
index ef2ebd6..6669670 100644
--- a/Project.toml
+++ b/Project.toml
@@ -4,6 +4,7 @@ authors = ["Erik Schnetter <schnetter@gmail.com>", "Kristoffer Carlsson <kristof
 version = "3.5.0"
 
 [deps]
+BFloat16s = "ab4f0b2a-ad5b-11e8-123f-65d77653426b"
 PrecompileTools = "aea7be01-6a6a-4083-8856-8a6e6704d82a"
 
 [compat]
diff --git a/src/LLVM_intrinsics.jl b/src/LLVM_intrinsics.jl
index f7eebab..5677df5 100644
--- a/src/LLVM_intrinsics.jl
+++ b/src/LLVM_intrinsics.jl
@@ -10,7 +10,7 @@ module Intrinsics
 # when passed to LLVM. It is up to the caller to make sure that the correct
 # intrinsic is called (e.g uitofp vs sitofp).
 
-import ..SIMD: SIMD, VE, LVec, FloatingTypes
+import ..SIMD: SIMD, VE, LVec, FloatingTypes, BFloat16
 # Include Bool in IntegerTypes
 const IntegerTypes = Union{SIMD.IntegerTypes, Bool}
 
@@ -31,6 +31,7 @@ const d = Dict{DataType, String}(
     Float16      => "half",
     Float32      => "float",
     Float64      => "double",
+    BFloat16     => "bfloat",
 )
 # Add the Ptr translations
 # Julia <=1.11 (LLVM <=16) passes `Ptr{T}` as `i64`, Julia >=1.12 (LLVM >=17) passes them as `T*`.
diff --git a/src/SIMD.jl b/src/SIMD.jl
index 1bf0a17..9cb5fb3 100644
--- a/src/SIMD.jl
+++ b/src/SIMD.jl
@@ -2,6 +2,8 @@ module SIMD
 
 using Base: @propagate_inbounds
 
+using BFloat16s: BFloat16
+
 export Vec, vload, vloada, vloadnt, vloadx, vstore, vstorea, vstorent, vstorec,
        vgather, vgathera, vscatter, vscattera, shufflevector, vifelse, valloc,
        VecRange
@@ -14,7 +16,7 @@ const BIntTypes     = Union{IntTypes, Bool}
 const UIntTypes     = Union{UInt8, UInt16, UInt32, UInt64}
 const IntegerTypes  = Union{IntTypes, UIntTypes}
 const BIntegerTypes = Union{IntegerTypes, Bool}
-const FloatingTypes = Union{Float16, Float32, Float64}
+const FloatingTypes = Union{Float16, Float32, Float64, BFloat16}
 const ScalarTypes   = Union{IntegerTypes, FloatingTypes}
 const VecTypes      = Union{ScalarTypes, Ptr, Bool}
 include("LLVM_intrinsics.jl")