Set up some type of CI for this repository

[mithro]

We should have CI running on this repository.

@atorkmabrains can you write down the initial plan in this GitHub Issue?

Related GitHub Issues on other parts of the PDK;

• CI should check that the standard cells pass the GF180MCU DRC rules globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0#2
• CI should check that the standard cells pass the GF180MCU DRC rules globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0#2
• The KLayout DRC rule tests should be run using GitHub Actions globalfoundries-pdk-libs-gf180mcu_fd_pr#3
• The KLayout LVS tests should be run using GitHub Actions globalfoundries-pdk-libs-gf180mcu_fd_pr#4

Testing related GitHub Issues on the PDK;

• Add verilog test benches for each of the standard cells. globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0#5
• Add verilog test benches for each of the standard cells. globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0#4
• Add test benches and example (spice / analog) simulations for the .cdl files globalfoundries-pdk-ip-gf180mcu_fd_ip_sram#2
• Add test benches and example digital simulations for the .v (verilog) files globalfoundries-pdk-ip-gf180mcu_fd_ip_sram#3
• Add example which generates the .lef / .cdl (.spice) from the GDS using Magic globalfoundries-pdk-ip-gf180mcu_fd_ip_sram#4

[atorkmabrains]

Yes

[atorkmabrains]

Hi @mithro ,

We have about 60% of the regression tests for gf180mcu-pdk built for most of the PDK components. We just need to convert the running of those regression to be as CI.

@mithro What do you recommend us doing: adding those regression scripts into this main repo or having a separate repo called regression to include all the testing?

[mithro]

If I understand what you are saying, then please add them directly to this repository.

[atorkmabrains]

Sounds Great, we will add regression tests as CI. BTW, they take long time to run.

[mithro]

@atorkmabrains - Taking a long time to run is fine, we have a bunch of ways we can speed that up.

[mithro]

Related GitHub Issues on other parts of the PDK;

• CI should check that the standard cells pass the GF180MCU DRC rules globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0#2
• CI should check that the standard cells pass the GF180MCU DRC rules globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0#2
• The KLayout DRC rule tests should be run using GitHub Actions globalfoundries-pdk-libs-gf180mcu_fd_pr#3
• The KLayout LVS tests should be run using GitHub Actions globalfoundries-pdk-libs-gf180mcu_fd_pr#4

Testing related GitHub Issues on the PDK;

• Add verilog test benches for each of the standard cells. globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0#5
• Add verilog test benches for each of the standard cells. globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0#4
• Add test benches and example (spice / analog) simulations for the .cdl files globalfoundries-pdk-ip-gf180mcu_fd_ip_sram#2
• Add test benches and example digital simulations for the .v (verilog) files globalfoundries-pdk-ip-gf180mcu_fd_ip_sram#3
• Add example which generates the .lef / .cdl (.spice) from the GDS using Magic globalfoundries-pdk-ip-gf180mcu_fd_ip_sram#4

[atorkmabrains]

@mithro @mohanad0mohamed is currently working on it.