v1.0.0
First numbered release.
Can be run from UEFI shell, U-Boot (with EFI support). Should work in any EFI environment.
QEMU "max" cpu information:
ArmCpuInfo v1.0.0
ID_AA64MMFR0_EL1 = 0x0100032310201126
ID_AA64MMFR1_EL1 = 0x0010011010312122
ID_AA64MMFR2_EL1 = 0x1221011110011011
ID_AA64PFR0_EL1 = 0x1201001121112222
ID_AA64PFR1_EL1 = 0x0000000001000121
ID_AA64ISAR0_EL1 = 0x1221111110212120
ID_AA64ISAR1_EL1 = 0x0011111101211052
ID_AA64ISAR2_EL1 = 0x0000000000110000
ID_AA64DFR0_EL1 = 0x0000000010305609
ID_AA64SMFR0_EL1 = 0x80F100FD00000000
ID_AA64ZFR0_EL1 = 0x0110110100110021
Reg | Bits | Value | Feature
------|-------|-------|----------------------------------------------
MMFR0 | 3:0 | 0110 | 52 Bits (4PB) of physical address range supported.
| | | FEAT_LPA implemented.
MMFR0 | 7:4 | 0010 | ASID: 16 Bits
MMFR0 | 11:8 | 0001 | Mixed-endian support.
MMFR0 | 19:16 | 0000 | No mixed-endian support at EL0.
MMFR0 | 15:12 | 0001 | Supports a distinction between Secure and Non-Secure Memory.
MMFR0 | 31:28 | 0001 | 4KB granule supported for 52-bit address.
MMFR0 | 43:40 | 0011 | 4KB granule supported at stage 2 for 52-bit address.
MMFR0 | 23:20 | 0010 | 16KB granule supported for 52-bit address.
MMFR0 | 35:32 | 0011 | 16KB granule supported at stage 2 for 52-bit address.
MMFR0 | 27:24 | 0000 | 64KB granule supported.
MMFR0 | 39:36 | 0010 | 64KB granule supported at stage 2.
MMFR0 | 47:44 | 0000 | FEAT_ExS not implemented.
MMFR0 | 59:56 | 0001 | FEAT_FGT implemented.
MMFR0 | 63:60 | 0000 | FEAT_ECV not implemented.
------|-------|-------|----------------------------------------------
MMFR1 | 3:0 | 0010 | FEAT_HAFDBS implemented with dirty status support.
MMFR1 | 7:4 | 0010 | FEAT_VMID16 implemented.
MMFR1 | 11:8 | 0001 | FEAT_VHE implemented.
MMFR1 | 15:12 | 0010 | FEAT_HPDS2 implemented.
MMFR1 | 19:16 | 0001 | FEAT_LOR implemented.
MMFR1 | 23:20 | 0011 | FEAT_PAN3 implemented.
MMFR1 | 27:24 | 0000 | The PE never generates an SError interrupt due to
| | | an External abort on a speculative read.
MMFR1 | 31:28 | 0001 | FEAT_XNX implemented.
MMFR1 | 35:32 | 0000 | FEAT_TWED not implemented.
MMFR1 | 39:36 | 0001 | FEAT_ETS implemented.
MMFR1 | 43:40 | 0001 | FEAT_HCX implemented.
MMFR1 | 47:44 | 0000 | FEAT_AFP not implemented.
MMFR1 | 51:48 | 0000 | FEAT_nTLBPA not implemented.
MMFR1 | 55:52 | 0001 | FEAT_TIDCP1 implemented
MMFR1 | 59:56 | 0000 | FEAT_CMOW not implemented.
------|-------|-------|----------------------------------------------
MMFR2 | 3:0 | 0001 | FEAT_TTCNP implemented.
MMFR2 | 7:4 | 0001 | FEAT_UAO implemented.
MMFR2 | 11:8 | 0000 | FEAT_LSMAOC not implemented.
MMFR2 | 15:12 | 0001 | FEAT_IESB implemented.
MMFR2 | 19:16 | 0001 | FEAT_LVA implemented.
MMFR2 | 23:20 | 0000 | FEAT_CCIDX not implemented.
MMFR2 | 27:24 | 0000 | FEAT_NV not implemented.
MMFR2 | 31:28 | 0001 | FEAT_TTST implemented.
MMFR2 | 35:32 | 0001 | FEAT_LSE2 implemented.
MMFR2 | 39:36 | 0001 | FEAT_IDST implemented.
MMFR2 | 43:40 | 0001 | FEAT_S2FWB implemented.
MMFR2 | 51:48 | 0001 | FEAT_TTL implemented.
MMFR2 | 55:52 | 0010 | FEAT_BBM: Level 2 support for changing block size is supported.
MMFR2 | 59:56 | 0010 | FEAT_EVT: HCR_EL2.{TTLBOS, TTLSBIS, TOCU, TICAB, TID4} traps are supported.
MMFR2 | 63:60 | 0001 | FEAT_E0PD implemented.
------|-------|-------|----------------------------------------------
PFR0 | 3:0 | 0010 | EL0 in AArch64 and AArch32
PFR0 | 7:4 | 0010 | EL1 in AArch64 and AArch32
PFR0 | 11:8 | 0010 | EL2 in AArch64 and AArch32
PFR0 | 15:12 | 0010 | EL3 in AArch64 and AArch32
PFR0 | 19:16 | 0001 | Floating-point with half-precision support (FEAT_FP16).
PFR0 | 23:20 | 0001 | Advanced SIMD with half precision support (FEAT_FP16).
PFR0 | 27:24 | 0001 | System registers to versions 3.0/4.0 of GIC CPU implemented.
PFR0 | 31:28 | 0010 | FEAT_RASv1p1 implemented. FEAT_DoubleFault implemented.
PFR0 | 35:32 | 0001 | FEAT_SVE implemented.
PFR0 | 39:36 | 0001 | Secure EL2 implemented.
PFR0 | 43:40 | 0000 | FEAT_MPAM not implemented.
PFR0 | 47:44 | 0000 | FEAT_AMU not implemented.
PFR0 | 51:48 | 0001 | FEAT_DIT implemented.
PFR0 | 55:52 | 0000 | FEAT_RME not implemented
PFR0 | 59:56 | 0010 | FEAT_CSV2_2 implemented.
PFR0 | 63:60 | 0001 | FEAT_CSV3 implemented.
------|-------|-------|----------------------------------------------
PFR1 | 3:0 | 0001 | FEAT_BTI implemented.
PFR1 | 7:4 | 0010 | FEAT_SSBS2 implemented.
PFR1 | 11:8 | 0001 | FEAT_MTE implemented.
PFR1 | 27:24 | 0001 | FEAT_SME implemented.
PFR1 | 31:28 | 0000 | FEAT_RNG_TRAP not implemented.
PFR1 | 39:36 | 0000 | FEAT_NMI not implemented.
------|-------|-------|----------------------------------------------
ISAR0 | 7:4 | 0010 | FEAT_AES and FEAT_PMULL implemented.
ISAR0 | 11:8 | 0001 | FEAT_SHA1 implemented.
ISAR0 | 15:12 | 0010 | FEAT_SHA512 implemented.
ISAR0 | 19:16 | 0001 | CRC32 instructions implemented.
ISAR0 | 23:20 | 0010 | FEAT_LSE implemented.
ISAR0 | 27:24 | 0000 | TME instructions not implemented.
ISAR0 | 31:28 | 0001 | FEAT_RDM implemented.
ISAR0 | 35:32 | 0001 | FEAT_SHA3 implemented.
ISAR0 | 39:36 | 0001 | FEAT_SM3 implemented.
ISAR0 | 43:40 | 0001 | FEAT_SM4 implemented.
ISAR0 | 47:44 | 0001 | FEAT_DotProd implemented.
ISAR0 | 51:48 | 0001 | FEAT_FHM implemented.
ISAR0 | 55:52 | 0010 | FEAT_FlagM2 implemented.
ISAR0 | 59:56 | 0010 | FEAT_TLBIRANGE implemented.
ISAR0 | 63:60 | 0001 | FEAT_RNG implemented.
------|-------|-------|----------------------------------------------
ISAR1 | 3:0 | 0010 | FEAT_DPB2 implemented.
ISAR1 | 7:4 | 0101 | FEAT_FPACCOMBINE implemented.
| | | FEAT_PACQARMA5 implemented.
ISAR1 | 11:8 | 0000 | Address Authentication (API) not implemented.
ISAR1 | 15:12 | 0001 | FEAT_JSCVT implemented.
ISAR1 | 19:16 | 0001 | FEAT_FCMA implemented.
ISAR1 | 23:20 | 0010 | FEAT_LRCPC2 implemented.
ISAR1 | 27:24 | 0001 | FEAT_PACQARMA5 implemented.
ISAR1 | 31:28 | 0000 | FEAT_PACIMP not implemented.
ISAR1 | 35:32 | 0001 | FEAT_FRINTTS implemented.
ISAR1 | 39:36 | 0001 | FEAT_SB implemented.
ISAR1 | 43:40 | 0001 | FEAT_SPECRES implemented.
ISAR1 | 47:44 | 0001 | FEAT_BF16 implemented.
ISAR1 | 51:48 | 0001 | FEAT_DGH implemented.
ISAR1 | 55:52 | 0001 | FEAT_I8MM implemented.
ISAR1 | 59:56 | 0000 | FEAT_XS not implemented.
ISAR1 | 63:60 | 0000 | FEAT_LS64 not implemented.
------|-------|-------|----------------------------------------------
ISAR2 | 3:0 | 0000 | FEAT_WFxT not implemented.
ISAR2 | 7:4 | 0000 | FEAT_RPRES not implemented.
ISAR2 | 11:8 | 0000 | FEAT_PACQARMA3 not implemented.
ISAR2 | 15:12 | 0000 | Address Authentication (APA3) not implemented.
ISAR2 | 19:16 | 0001 | FEAT_MOPS implemented.
ISAR2 | 23:20 | 0001 | FEAT_HBC implemented.
ISAR2 | 27:24 | 0000 | FEAT_CONSTPACFIELD not implemented.
------|-------|-------|----------------------------------------------
DFR0 | 3:0 | 1001 | FEAT_Debugv8p4 implemented.
DFR0 | 7:4 | 0000 | Trace unit System registers not implemented.
DFR0 | 11:8 | 0110 | FEAT_PMUv3p5 implemented.
DFR0 | 15:12 | 0101 | Number of breakpoints, minus 1.
DFR0 | 23:20 | 0011 | Number of watchpoints, minus 1.
DFR0 | 31:28 | 0001 | Number of breakpoints that are context-aware, minus 1.
DFR0 | 35:32 | 0000 | FEAT_SPE not implemented.
DFR0 | 39:36 | 0000 | FEAT_DoubleLock implemented.
DFR0 | 43:40 | 0000 | FEAT_TRF not implemented.
DFR0 | 47:44 | 0000 | FEAT_TRBE not implemented.
DFR0 | 51:48 | 0000 | FEAT_MTPMU not implemented.
DFR0 | 55:52 | 0000 | FEAT_BRBE not implemented.
DFR0 | 63:60 | 0000 | Setting MDCR_EL2.HPMN to zero has CONSTRAINED UNPREDICTABLE behavior.
------|-------|-------|----------------------------------------------
SMFR0 | 32 | 0001 | SME F32F32 implemented.
SMFR0 | 34 | 0001 | SME B16F32 implemented.
SMFR0 | 35 | 0001 | SME F16F32 implemented.
SMFR0 | 39:36 | 1111 | SME I8I32 implemented.
SMFR0 | 48 | 0001 | SME F64F64 implemented.
SMFR0 | 55:52 | 1111 | SME I16I64 implemented
SMFR0 | 59:56 | 0000 | Mandatory SME instructions are implemented.
SMFR0 | 63 | 0001 | SME_FA64 implemented.
------|-------|-------|----------------------------------------------
ZFR0 | 3:0 | 0001 | FEAT_SVE2 implemented.
ZFR0 | 7:4 | 0010 | FEAT_SVE_AES and FEAT_SVE_PMULL128 implemented.
ZFR0 | 19:16 | 0001 | FEAT_SVE_BitPerm implemented.
ZFR0 | 23:20 | 0001 | FEAT_BF16 SVE implemented.
ZFR0 | 35:32 | 0001 | FEAT_SVE_SHA3 implemented.
ZFR0 | 43:40 | 0001 | FEAT_SVE_SM4 implemented.
ZFR0 | 47:44 | 0001 | FEAT_I8MM SVE implemented.
ZFR0 | 55:52 | 0001 | FEAT_F32MM SVE implemented
ZFR0 | 59:56 | 0001 | FEAT_F64MM SVE implemented
------|-------|-------|----------------------------------------------