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We recently encountered some issues while using the Novatech DDS9m for timing operations. We connected the pseudo-clock and DDS9m via labscript, and we assumed that the pseudo-clock would send signals to DDS9m to control its state transitions.
According to the latest DDS9m manual, the timing commands for Channel 0 & 1 can be stored in its internal memory in the form of ‘ff’ (which will not switch automatically unless a TS command is input). The state transition is controlled via TS/pin 10. However, we found that the trigger signal provided by the pseudo-clock is a rising edge, while DDS9m’s pin 10 expects a falling edge trigger.
We would like to ask how you controlled the timing of DDS9m when you used it. Currently, we are sending commands via RS232 and using pin 10 to receive the trigger signal from the pseudo-clock. However, due to the mismatch in edge triggering (rising edge vs. falling edge), directly connecting them results in a half-period shift (not rigorously speaking, but essentially, the total width of one trigger signal).
Would it be necessary to use additional logic gates (e.g., an inverter) to correct this, or is there another method to resolve the issue?
We sincerely appreciate your help!
The text was updated successfully, but these errors were encountered:
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To use TS/pin 10 to switch Channel 1 and 2 parameters in timing with the Novatech DDS9m
To use TS/pin 10 to switch Channel 1 and 0 parameters in timing with the Novatech DDS9m
Mar 3, 2025
The summary is that you can't just invert the signal as you need to feed different edges to pin 10 and pin 14, so the electronics are slightly more complex than just an inverter.
There may also be some other approaches documented on the mailing list (google group).
Dear Developer,
We recently encountered some issues while using the Novatech DDS9m for timing operations. We connected the pseudo-clock and DDS9m via labscript, and we assumed that the pseudo-clock would send signals to DDS9m to control its state transitions.
According to the latest DDS9m manual, the timing commands for Channel 0 & 1 can be stored in its internal memory in the form of ‘ff’ (which will not switch automatically unless a TS command is input). The state transition is controlled via TS/pin 10. However, we found that the trigger signal provided by the pseudo-clock is a rising edge, while DDS9m’s pin 10 expects a falling edge trigger.
We would like to ask how you controlled the timing of DDS9m when you used it. Currently, we are sending commands via RS232 and using pin 10 to receive the trigger signal from the pseudo-clock. However, due to the mismatch in edge triggering (rising edge vs. falling edge), directly connecting them results in a half-period shift (not rigorously speaking, but essentially, the total width of one trigger signal).
Would it be necessary to use additional logic gates (e.g., an inverter) to correct this, or is there another method to resolve the issue?
We sincerely appreciate your help!
The text was updated successfully, but these errors were encountered: