From 4665334c544d00046c4b309d998e3813c99dabf5 Mon Sep 17 00:00:00 2001
From: Connor Horman <chorman64@gmail.com>
Date: Sun, 10 Mar 2024 22:19:04 -0400
Subject: [PATCH] feat(arch-ops): Add x86 instructions for vector xor

---
 arch-ops/src/x86/codegen/insn.rs | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch-ops/src/x86/codegen/insn.rs b/arch-ops/src/x86/codegen/insn.rs
index e0f9dc2..649f96f 100644
--- a/arch-ops/src/x86/codegen/insn.rs
+++ b/arch-ops/src/x86/codegen/insn.rs
@@ -605,4 +605,19 @@ x86_codegen_instructions! {
         [Reg(Xmm | Ymm | Zmm), MemOrReg(Xmm | Ymm | Zmm)] => Vex | Evex 0x0F10 @ ModRM(ModRMOptions::NONE);
         [MemOrReg(Xmm | Ymm | Zmm), Reg(Xmm | Ymm | Zmm)] => Vex | Evex 0x0F11 @ ModRM(ModRMOptions::NONE);
     }
+    insn xorps{
+        [Reg(Xmm), MemOrReg(Xmm)] => NoPrefix | Rex 0x0F57 @ ModRM(ModRMOptions::NONE);
+    }
+    insn vxorps{
+        [Reg(Xmm | Ymm | Zmm), MemOrReg(Xmm | Ymm | Zmm)] => Vex | Evex 0x0F57 @ ModRM(ModRMOptions::NONE);
+    }
+    insn pxor{
+        [Reg(Xmm), MemOrReg(Xmm)] => NoPrefix | Rex 0x66000FEF @ ModRM(ModRMOptions::NONE);
+    }
+    insn vpxor{
+        [Reg(Xmm | Ymm), MemOrReg(Xmm | Ymm)] => Vex 0x66000FEF @ ModRM(ModRMOptions::NONE);
+    }
+    insn vpxord{
+        [Reg(Xmm | Ymm | Zmm), MemOrReg(Xmm | Ymm | Zmm)] => Evex 0x66000FEF @ ModRM(ModRMOptions::NONE);
+    }
 }