Description
This part was very confusing to me:
For DXBC and DXIL shaders, use the following register order:
(t[n], space0): Sampled textures, followed by read-only storage textures, followed by read-only storage buffers
Am I required to order the textures first, and buffers second?
So for example, would this code need to be reordered?
Texture2D texture0 : register(t0, space0);
StructuredBuffer buffer0 : register(t1, space0);
Texture2D texture1 : register(t2, space0);
to:
Texture2D texture0 : register(t0, space0);
Texture2D texture1 : register(t1, space0);
StructuredBuffer buffer0 : register(t2, space0);
?
Also, related to this confusion is setting of these buffers in code using SDL_BindGPUComputeStorageTextures and SDL_BindGPUComputeStorageBuffers. It was very unclear to me that the 'first_slot' parameter in these functions DOES NOT related to the t-registers in hlsl. So to set buffer0 in the reordered code above, I need to call SDL_BindGPUComputeStorageBuffers with first_slot set to 0, instead of 2 (which is what I was expecting)
Cheers,
Nick