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* QEMU OpenTitan UART device
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*
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* Copyright (c) 2022-2024 Rivos, Inc.
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+ * Copyright (c) 2025 lowRISC contributors.
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*
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* Author(s):
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* Loïc Lefort <loic@rivosinc.com>
@@ -156,6 +157,7 @@ struct OtUARTState {
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uint32_t tx_watermark_level ;
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guint watch_tag ;
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+ char * ot_id ;
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uint32_t pclk ;
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CharBackend chr ;
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};
@@ -180,7 +182,7 @@ static void ot_uart_update_irqs(OtUARTState *s)
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{
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uint32_t state_masked = s -> regs [R_INTR_STATE ] & s -> regs [R_INTR_ENABLE ];
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- trace_ot_uart_irqs (s -> regs [R_INTR_STATE ], s -> regs [R_INTR_ENABLE ],
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+ trace_ot_uart_irqs (s -> ot_id , s -> regs [R_INTR_STATE ], s -> regs [R_INTR_ENABLE ],
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state_masked );
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for (int index = 0 ; index < OT_UART_IRQ_NUM ; index ++ ) {
@@ -451,7 +453,7 @@ static uint64_t ot_uart_read(void *opaque, hwaddr addr, unsigned size)
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}
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uint32_t pc = ibex_get_current_pc ();
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- trace_ot_uart_io_read_out ((uint32_t )addr , REG_NAME (reg ), val32 , pc );
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+ trace_ot_uart_io_read_out (s -> ot_id , (uint32_t )addr , REG_NAME (reg ), val32 , pc );
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return (uint64_t )val32 ;
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}
@@ -466,7 +468,7 @@ static void ot_uart_write(void *opaque, hwaddr addr, uint64_t val64,
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hwaddr reg = R32_OFF (addr );
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uint32_t pc = ibex_get_current_pc ();
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- trace_ot_uart_io_write ((uint32_t )addr , REG_NAME (reg ), val32 , pc );
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+ trace_ot_uart_io_write (s -> ot_id , (uint32_t )addr , REG_NAME (reg ), val32 , pc );
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switch (reg ) {
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case R_INTR_STATE :
@@ -557,6 +559,7 @@ static const MemoryRegionOps ot_uart_ops = {
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};
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static Property ot_uart_properties [] = {
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+ DEFINE_PROP_STRING ("ot_id" , OtUARTState , ot_id ),
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DEFINE_PROP_CHR ("chardev" , OtUARTState , chr ),
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DEFINE_PROP_UINT32 ("pclk" , OtUARTState , pclk , 0u ),
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DEFINE_PROP_END_OF_LIST (),
@@ -579,18 +582,6 @@ static int ot_uart_be_change(void *opaque)
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return 0 ;
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}
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- static void ot_uart_realize (DeviceState * dev , Error * * errp )
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- {
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- OtUARTState * s = OT_UART (dev );
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- (void )errp ;
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-
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- fifo8_create (& s -> tx_fifo , OT_UART_TX_FIFO_SIZE );
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- fifo8_create (& s -> rx_fifo , OT_UART_RX_FIFO_SIZE );
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-
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- qemu_chr_fe_set_handlers (& s -> chr , ot_uart_can_receive , ot_uart_receive ,
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- NULL , ot_uart_be_change , s , NULL , true);
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- }
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-
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static void ot_uart_reset (DeviceState * dev )
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{
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OtUARTState * s = OT_UART (dev );
@@ -608,6 +599,23 @@ static void ot_uart_reset(DeviceState *dev)
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ibex_irq_set (& s -> alert , 0 );
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}
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+ static void ot_uart_realize (DeviceState * dev , Error * * errp )
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+ {
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+ OtUARTState * s = OT_UART (dev );
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+ (void )errp ;
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+
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+ if (!s -> ot_id ) {
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+ s -> ot_id =
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+ g_strdup (object_get_canonical_path_component (OBJECT (s )-> parent ));
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+ }
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+
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+ fifo8_create (& s -> tx_fifo , OT_UART_TX_FIFO_SIZE );
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+ fifo8_create (& s -> rx_fifo , OT_UART_RX_FIFO_SIZE );
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+
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+ qemu_chr_fe_set_handlers (& s -> chr , ot_uart_can_receive , ot_uart_receive ,
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+ NULL , ot_uart_be_change , s , NULL , true);
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+ }
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+
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static void ot_uart_init (Object * obj )
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{
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OtUARTState * s = OT_UART (obj );
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