@@ -239,16 +239,16 @@ struct OtPwrMgrState {
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IbexIRQ cpu_enable ;
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IbexIRQ pwr_lc_req ;
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IbexIRQ pwr_otp_req ;
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+ IbexIRQ reset_req ;
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OtPwrMgrFastState f_state ;
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OtPwrMgrSlowState s_state ;
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OtPwrMgrEvents fsm_events ;
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uint32_t * regs ;
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- OtPwrMgrResetReq reset_req ;
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+ OtPwrMgrResetReq reset_request ;
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char * ot_id ;
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- OtRstMgrState * rstmgr ;
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uint8_t num_rom ;
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uint8_t version ;
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bool main ; /* main power manager (for machines w/ multiple PwrMgr) */
@@ -500,16 +500,16 @@ static void ot_pwrmgr_rst_req(void *opaque, int irq, int level)
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}
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s -> regs [R_RESET_STATUS ] |= rstbit ;
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- g_assert (s -> reset_req .domain == OT_PWRMGR_NO_DOMAIN );
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+ g_assert (s -> reset_request .domain == OT_PWRMGR_NO_DOMAIN );
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- s -> reset_req .domain = OT_PWRMGR_SLOW_DOMAIN ;
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+ s -> reset_request .domain = OT_PWRMGR_SLOW_DOMAIN ;
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int req = PWRMGR_RESET_DISPATCH [s -> version ][src ];
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if (req < 0 ) {
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/* not yet implemented */
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g_assert_not_reached ();
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}
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- s -> reset_req .req = req ;
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+ s -> reset_request .req = req ;
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trace_ot_pwrmgr_reset_req (s -> ot_id , "scheduling reset" , src );
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@@ -538,10 +538,10 @@ static void ot_pwrmgr_sw_rst_req(void *opaque, int irq, int level)
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s -> regs [R_RESET_STATUS ] |= rstbit ;
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- g_assert (s -> reset_req .domain == OT_PWRMGR_NO_DOMAIN );
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+ g_assert (s -> reset_request .domain == OT_PWRMGR_NO_DOMAIN );
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- s -> reset_req .req = OT_RSTMGR_RESET_SW ;
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- s -> reset_req .domain = OT_PWRMGR_FAST_DOMAIN ;
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+ s -> reset_request .req = OT_RSTMGR_RESET_SW ;
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+ s -> reset_request .domain = OT_PWRMGR_FAST_DOMAIN ;
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trace_ot_pwrmgr_reset_req (s -> ot_id , "scheduling SW reset" , 0 );
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@@ -643,9 +643,10 @@ static void ot_pwrmgr_fast_fsm_tick(OtPwrMgrState *s)
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/* fallthrough */
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case OT_PWR_FAST_ST_RESET_PREP :
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PWR_CHANGE_FAST_STATE (s , RESET_WAIT );
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- ot_rstmgr_reset_req (s -> rstmgr , (bool )s -> reset_req .domain ,
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- s -> reset_req .req );
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- s -> reset_req .domain = OT_PWRMGR_NO_DOMAIN ;
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+ ibex_irq_set (& s -> reset_req ,
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+ OT_RSTMGR_RESET_REQUEST (s -> reset_request .domain ,
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+ s -> reset_request .req ));
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+ s -> reset_request .domain = OT_PWRMGR_NO_DOMAIN ;
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break ;
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/* NOLINTNEXTLINE */
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case OT_PWR_FAST_ST_RESET_WAIT :
@@ -880,8 +881,6 @@ static Property ot_pwrmgr_properties[] = {
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DEFINE_PROP_UINT8 ("version" , OtPwrMgrState , version , UINT8_MAX ),
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DEFINE_PROP_BOOL ("fetch-ctrl" , OtPwrMgrState , fetch_ctrl , false),
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DEFINE_PROP_BOOL ("main" , OtPwrMgrState , main , true),
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- DEFINE_PROP_LINK ("rstmgr" , OtPwrMgrState , rstmgr , TYPE_OT_RSTMGR ,
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- OtRstMgrState * ),
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DEFINE_PROP_END_OF_LIST (),
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};
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@@ -917,8 +916,6 @@ static void ot_pwrmgr_reset_enter(Object *obj, ResetType type)
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c -> parent_phases .enter (obj , type );
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}
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- assert (s -> rstmgr );
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-
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timer_del (s -> cdc_sync );
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memset (s -> regs , 0 , REGS_SIZE );
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@@ -938,6 +935,7 @@ static void ot_pwrmgr_reset_enter(Object *obj, ResetType type)
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ibex_irq_set (& s -> pwr_otp_req , 0 );
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ibex_irq_set (& s -> pwr_lc_req , 0 );
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ibex_irq_set (& s -> alert , 0 );
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+ ibex_irq_set (& s -> reset_req , 0 );
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}
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static void ot_pwrmgr_reset_exit (Object * obj )
@@ -991,6 +989,7 @@ static void ot_pwrmgr_init(Object *obj)
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ibex_qdev_init_irq (obj , & s -> pwr_otp_req , OT_PWRMGR_OTP_REQ );
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ibex_qdev_init_irq (obj , & s -> cpu_enable , OT_PWRMGR_CPU_EN );
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ibex_qdev_init_irq (obj , & s -> strap , OT_PWRMGR_STRAP );
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+ ibex_qdev_init_irq (obj , & s -> reset_req , OT_PWRMGR_RST_REQ );
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s -> cdc_sync = timer_new_ns (OT_VIRTUAL_CLOCK , & ot_pwrmgr_cdc_sync , s );
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