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[ot] hw/opentitan: ot_rstmgr, ot_pwrmgr: replace dedicated API with IRQ line
Reset request is now managed with an IRQ line, not a dedicated function call. Signed-off-by: Emmanuel Blot <eblot@rivosinc.com>
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4 files changed

+47
-35
lines changed

4 files changed

+47
-35
lines changed

hw/opentitan/ot_pwrmgr.c

Lines changed: 14 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -239,16 +239,16 @@ struct OtPwrMgrState {
239239
IbexIRQ cpu_enable;
240240
IbexIRQ pwr_lc_req;
241241
IbexIRQ pwr_otp_req;
242+
IbexIRQ reset_req;
242243

243244
OtPwrMgrFastState f_state;
244245
OtPwrMgrSlowState s_state;
245246
OtPwrMgrEvents fsm_events;
246247

247248
uint32_t *regs;
248-
OtPwrMgrResetReq reset_req;
249+
OtPwrMgrResetReq reset_request;
249250

250251
char *ot_id;
251-
OtRstMgrState *rstmgr;
252252
uint8_t num_rom;
253253
uint8_t version;
254254
bool main; /* main power manager (for machines w/ multiple PwrMgr) */
@@ -500,16 +500,16 @@ static void ot_pwrmgr_rst_req(void *opaque, int irq, int level)
500500
}
501501
s->regs[R_RESET_STATUS] |= rstbit;
502502

503-
g_assert(s->reset_req.domain == OT_PWRMGR_NO_DOMAIN);
503+
g_assert(s->reset_request.domain == OT_PWRMGR_NO_DOMAIN);
504504

505-
s->reset_req.domain = OT_PWRMGR_SLOW_DOMAIN;
505+
s->reset_request.domain = OT_PWRMGR_SLOW_DOMAIN;
506506

507507
int req = PWRMGR_RESET_DISPATCH[s->version][src];
508508
if (req < 0) {
509509
/* not yet implemented */
510510
g_assert_not_reached();
511511
}
512-
s->reset_req.req = req;
512+
s->reset_request.req = req;
513513

514514
trace_ot_pwrmgr_reset_req(s->ot_id, "scheduling reset", src);
515515

@@ -538,10 +538,10 @@ static void ot_pwrmgr_sw_rst_req(void *opaque, int irq, int level)
538538

539539
s->regs[R_RESET_STATUS] |= rstbit;
540540

541-
g_assert(s->reset_req.domain == OT_PWRMGR_NO_DOMAIN);
541+
g_assert(s->reset_request.domain == OT_PWRMGR_NO_DOMAIN);
542542

543-
s->reset_req.req = OT_RSTMGR_RESET_SW;
544-
s->reset_req.domain = OT_PWRMGR_FAST_DOMAIN;
543+
s->reset_request.req = OT_RSTMGR_RESET_SW;
544+
s->reset_request.domain = OT_PWRMGR_FAST_DOMAIN;
545545

546546
trace_ot_pwrmgr_reset_req(s->ot_id, "scheduling SW reset", 0);
547547

@@ -643,9 +643,10 @@ static void ot_pwrmgr_fast_fsm_tick(OtPwrMgrState *s)
643643
/* fallthrough */
644644
case OT_PWR_FAST_ST_RESET_PREP:
645645
PWR_CHANGE_FAST_STATE(s, RESET_WAIT);
646-
ot_rstmgr_reset_req(s->rstmgr, (bool)s->reset_req.domain,
647-
s->reset_req.req);
648-
s->reset_req.domain = OT_PWRMGR_NO_DOMAIN;
646+
ibex_irq_set(&s->reset_req,
647+
OT_RSTMGR_RESET_REQUEST(s->reset_request.domain,
648+
s->reset_request.req));
649+
s->reset_request.domain = OT_PWRMGR_NO_DOMAIN;
649650
break;
650651
/* NOLINTNEXTLINE */
651652
case OT_PWR_FAST_ST_RESET_WAIT:
@@ -880,8 +881,6 @@ static Property ot_pwrmgr_properties[] = {
880881
DEFINE_PROP_UINT8("version", OtPwrMgrState, version, UINT8_MAX),
881882
DEFINE_PROP_BOOL("fetch-ctrl", OtPwrMgrState, fetch_ctrl, false),
882883
DEFINE_PROP_BOOL("main", OtPwrMgrState, main, true),
883-
DEFINE_PROP_LINK("rstmgr", OtPwrMgrState, rstmgr, TYPE_OT_RSTMGR,
884-
OtRstMgrState *),
885884
DEFINE_PROP_END_OF_LIST(),
886885
};
887886

@@ -917,8 +916,6 @@ static void ot_pwrmgr_reset_enter(Object *obj, ResetType type)
917916
c->parent_phases.enter(obj, type);
918917
}
919918

920-
assert(s->rstmgr);
921-
922919
timer_del(s->cdc_sync);
923920
memset(s->regs, 0, REGS_SIZE);
924921

@@ -938,6 +935,7 @@ static void ot_pwrmgr_reset_enter(Object *obj, ResetType type)
938935
ibex_irq_set(&s->pwr_otp_req, 0);
939936
ibex_irq_set(&s->pwr_lc_req, 0);
940937
ibex_irq_set(&s->alert, 0);
938+
ibex_irq_set(&s->reset_req, 0);
941939
}
942940

943941
static void ot_pwrmgr_reset_exit(Object *obj)
@@ -991,6 +989,7 @@ static void ot_pwrmgr_init(Object *obj)
991989
ibex_qdev_init_irq(obj, &s->pwr_otp_req, OT_PWRMGR_OTP_REQ);
992990
ibex_qdev_init_irq(obj, &s->cpu_enable, OT_PWRMGR_CPU_EN);
993991
ibex_qdev_init_irq(obj, &s->strap, OT_PWRMGR_STRAP);
992+
ibex_qdev_init_irq(obj, &s->reset_req, OT_PWRMGR_RST_REQ);
994993

995994
s->cdc_sync = timer_new_ns(OT_VIRTUAL_CLOCK, &ot_pwrmgr_cdc_sync, s);
996995

hw/opentitan/ot_rstmgr.c

Lines changed: 27 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -200,19 +200,6 @@ static const char *OT_RST_MGR_REQUEST_NAMES[] = {
200200
OT_RST_MGR_REQUEST_NAMES[(_req_)] : \
201201
"?"
202202

203-
/* -------------------------------------------------------------------------- */
204-
/* Public API */
205-
/* -------------------------------------------------------------------------- */
206-
207-
void ot_rstmgr_reset_req(OtRstMgrState *s, bool fastclk, OtRstMgrResetReq req)
208-
{
209-
s->regs[R_RESET_INFO] = 1u << req;
210-
211-
trace_ot_rstmgr_reset_req(REQ_NAME(req), req, fastclk);
212-
213-
qemu_bh_schedule(s->bus_reset_bh);
214-
}
215-
216203
/* -------------------------------------------------------------------------- */
217204
/* Private implementation */
218205
/* -------------------------------------------------------------------------- */
@@ -303,6 +290,30 @@ static void ot_rstmgr_update_sw_reset(OtRstMgrState *s, unsigned devix)
303290
g_free(desc.path);
304291
}
305292

293+
static void ot_rstmgr_reset_req(void *opaque, int irq, int level)
294+
{
295+
OtRstMgrState *s = opaque;
296+
297+
if (!level) {
298+
/* reset line released */
299+
return;
300+
}
301+
302+
g_assert(irq == 0);
303+
304+
bool fastclk = ((unsigned)level >> 8u) & 1u;
305+
306+
level &= 0xff;
307+
g_assert(level < OT_RSTMGR_RESET_COUNT);
308+
309+
OtRstMgrResetReq req = (OtRstMgrResetReq)level;
310+
s->regs[R_RESET_INFO] = 1u << req;
311+
312+
trace_ot_rstmgr_reset_req(REQ_NAME(req), req, fastclk);
313+
314+
qemu_bh_schedule(s->bus_reset_bh);
315+
}
316+
306317
static uint64_t ot_rstmgr_regs_read(void *opaque, hwaddr addr, unsigned size)
307318
{
308319
OtRstMgrState *s = opaque;
@@ -550,6 +561,9 @@ static void ot_rstmgr_init(Object *obj)
550561
ibex_qdev_init_irq(obj, &s->sw_reset, OT_RSTMGR_SW_RST);
551562
ibex_qdev_init_irqs(obj, s->alerts, OT_DEVICE_ALERT, PARAM_NUM_ALERTS);
552563

564+
qdev_init_gpio_in_named(DEVICE(obj), &ot_rstmgr_reset_req,
565+
OT_RSTMGR_RST_REQ, 1);
566+
553567
s->bus_reset_bh = qemu_bh_new(&ot_rstmgr_reset_bus, s);
554568
}
555569

include/hw/opentitan/ot_pwrmgr.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@ typedef enum {
5757
#define OT_PWRMGR_OTP_REQ TYPE_OT_PWRMGR "-otp-req"
5858
#define OT_PWRMGR_CPU_EN TYPE_OT_PWRMGR "-cpu-en"
5959
#define OT_PWRMGR_STRAP TYPE_OT_PWRMGR "-strap"
60+
#define OT_PWRMGR_RST_REQ TYPE_OT_PWRMGR "-reset-req"
6061

6162
/* input lines */
6263
#define OT_PWRMGR_LC_RSP TYPE_OT_PWRMGR "-lc-rsp"

include/hw/opentitan/ot_rstmgr.h

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -49,12 +49,10 @@ typedef enum {
4949
OT_RSTMGR_RESET_COUNT,
5050
} OtRstMgrResetReq;
5151

52-
/*
53-
* Request a system reset
54-
*
55-
* @fastclk true for fast clock domain, @c false for aon/slow clock
56-
* @req type of reset request
57-
*/
58-
void ot_rstmgr_reset_req(OtRstMgrState *s, bool fastclk, OtRstMgrResetReq req);
52+
#define OT_RSTMGR_RESET_REQUEST(_fast_, _req_) \
53+
((int)((1u << 31u) | (((int)(bool)_fast_) << 8u) | _req_))
54+
55+
/* input lines */
56+
#define OT_RSTMGR_RST_REQ TYPE_OT_RSTMGR "-reset-req"
5957

6058
#endif /* HW_OPENTITAN_OT_RSTMGR_H */

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