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‎dspic33e-clock-switch/.main-meta/main.json

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"shortDescription":"Clock Switch",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-clock-switch/README.md

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@@ -8,7 +8,7 @@ In this example, CPU is initially configured to run from external secondary osc
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is initiated to run from Internal FRC.
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The RA4 pin toggles at frequency of 1/8th of system clock frequency.
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extern void clockSwitch(unsigned int r);
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extern void clockSwitch(unsigned int r);
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This function selects the next clock input and initiates clock switch sequence.
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## Software Used
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- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
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- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-crc-generation/.main-meta/main.json

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"shortDescription":"CRC Generation",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-crc-generation/README.md

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In this code examples, CRC module is used to generate CRC for input data.
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CRC_Calc_ChecksumByte()
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CRC_Calc_ChecksumByte()
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This function calculates the CRC Checksum for the array of bytes provided by the user based on the polynomial
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set in the CRCXORH and CRCXORL registers
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## Software Used
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- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
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- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-dma-trap/.main-meta/main.json

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"shortDescription":"DMA TRAP",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-dma-trap/README.md

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DMA generates trap error in the following conditions.
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DMA Write collision:
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DMA write collision occurs when both DMA module and CPU tries to write
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to the same DMA RAM memory location.
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DMA Write collision:
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DMA write collision occurs when both DMA module and CPU tries to write
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to the same DMA RAM memory location.
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Peripheral Write Collision:
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Peripheral write collision occurs when both DMA module and CPU tries to write
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to the same peripheral SFR.
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Peripheral Write Collision:
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Peripheral write collision occurs when both DMA module and CPU tries to write
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to the same peripheral SFR.
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In this code example, UART is configured to continuously transmit/receive data in loop-back mode.
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In the back-ground loop, CPU tries to write to DMA RAM or peripheral SFR to create DMA trap condition.
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Select the required condition using the following macro in main.c function to generate DMA trap.
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// Source Selection for Trap Creation
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#define PER_WRITE_COL 1
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#define DMA_WRITE_COL 0
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// Source Selection for Trap Creation
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#define PER_WRITE_COL 1
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#define DMA_WRITE_COL 0
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## Hardware Used
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## Software Used
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35-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
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- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-doze-mode/.main-meta/main.json

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"shortDescription":"CPU In DOZE MODE",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-doze-mode/README.md

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@@ -8,7 +8,7 @@ In this example, CPU is setup in DOZE mode to run at 1/128 of the System Clock.
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Device is initially configured to run at Fcy=60Mhz and then DOZE mode is enabled to run the CPU at 468.75Khz (60M/128).
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Check the RA4 pin toggles i.e at a frequency of ~234khz.
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extern void setDozeRatio(unsigned int r);
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extern void setDozeRatio(unsigned int r);
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This function sets the required DOZE ratio and enables the DOZE mode
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## Hardware Used
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## Software Used
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22-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
23-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
22+
- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-flash-rtsp/.main-meta/main.json

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"shortDescription":"Flash RTSP code example",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-flash-rtsp/README.md

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## Software Used
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25-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
26-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
25+
- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-frc-tuning/.main-meta/main.json

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"shortDescription":"Dynamic tuning of Internal Fast RC Oscillator",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-frc-tuning/README.md

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In Oscillator System Version 3, the TUN bits are located in the OSCTUN register. The traps.c file contains
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trap service routines (handlers) for hardware exceptions generated by the dsPIC33E device.
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The function in the tuneFrcOsc.c file has the following prototype:
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The function in the tuneFrcOsc.c file has the following prototype:
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Function: void tuneFrcOsc(unsigned int )
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Input: signed int data type equal in the range [-32,31]
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Function: void tuneFrcOsc(unsigned int )
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Input: signed int data type equal in the range [-32,31]
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Description: This subroutine writes to TUN bits which are present in the
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OSCTUN register.
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## Software Used
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37-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
38-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
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- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-math-error-trap/.main-meta/main.json

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"shortDescription":"Math Error Traps for Robust Operation",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",
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"content":{
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"metaDataVersion":"1.0.0",
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"category":"com.microchip.device",
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"name":"DSPIC33EP512MU810",
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"name":"dsPIC33EP512MU810",
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"versionRange":"*"
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}
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},

‎dspic33e-math-error-trap/README.md

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Math errors may be caused by one of the following:
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a. Divide by Zero
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1.Divide by Zero
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b. Accumulator A overflow (bit 31 destroyed)
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2.Accumulator A overflow (bit 31 destroyed)
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c. Accumulator B Overflow (bit 31 destroyed)
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3.Accumulator B Overflow (bit 31 destroyed)
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d. Catastrophic overflow of Accumulator A (bit 39 destroyed)
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4.Catastrophic overflow of Accumulator A (bit 39 destroyed)
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e. Catastrophic overflow of Accumulator B (bit 39 destroyed)
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5.Catastrophic overflow of Accumulator B (bit 39 destroyed)
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f. Accumulator Shift count error
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6.Accumulator Shift count error
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If the application defines an Math Error Trap service routine (trap handler), the processor will vector to the
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trap handler when it detects a math error.
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## Software Used
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46-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
47-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
46+
- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-open-drain/.main-meta/main.json

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"shortDescription":"Open Drain Configuration",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-open-drain/README.md

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The open-drain feature allows the generation of outputs higher than VDD
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(e.g., 5V on a 5V tolerant pin)by using external pull-up resistors.
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An external Pull up resistor should be connected for the port configured as
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open drain output.
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open drain output.
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Open drain output is default high because of the external pull up resistor.
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In software the port configured as open drain is set to low during initialization
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and set as high when Switch S3 is pressed.
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## Software Used
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25-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
26-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
26+
- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
27+
- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-oscillator-error-trap/.main-meta/main.json

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"shortDescription":"Oscillator failure traps and Fail-safe Clock Monitoring",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-oscillator-error-trap/README.md

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## Software Used
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42-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
43-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
42+
- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
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- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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‎dspic33e-sleep-wakeup/.main-meta/main.json

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"shortDescription":"Fast wake-up from SLEEP mode",
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"ide":{
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"name":"MPLABX",
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"semverRange":">=5.50.0"
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"semverRange":">=6.00"
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},
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"compiler":{
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"name":"XC16",

‎dspic33e-sleep-wakeup/README.md

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## Software Used
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35-
- MPLAB® X IDE v5.50 or newer (https://www.microchip.com/mplabx)
36-
- MPLAB® XC16 v1.70 or newer (https://www.microchip.com/xc)
35+
- MPLAB® X IDE v6.00 or newer (https://www.microchip.com/mplabx)
36+
- MPLAB® XC16 v2.00 or newer (https://www.microchip.com/xc)
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