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TDX: Enable partition and VP VTL hypercalls #922

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147 changes: 74 additions & 73 deletions openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -47,79 +47,6 @@ use virt_support_x86emu::translate::TranslateCachingInfo;
use virt_support_x86emu::translate::TranslationRegisters;
use zerocopy::FromZeros;

impl<'b, T, B: HardwareIsolatedBacking> UhHypercallHandler<'_, 'b, T, B>
where
UhProcessor<'b, B>: TlbFlushLockAccess,
{
pub fn hcvm_enable_partition_vtl(
&mut self,
partition_id: u64,
target_vtl: Vtl,
flags: hvdef::hypercall::EnablePartitionVtlFlags,
) -> HvResult<()> {
if partition_id != hvdef::HV_PARTITION_ID_SELF {
return Err(HvError::InvalidPartitionId);
}

let target_vtl = GuestVtl::try_from(target_vtl).map_err(|_| HvError::AccessDenied)?;
if target_vtl != GuestVtl::Vtl1 {
return Err(HvError::AccessDenied);
}

if flags.enable_supervisor_shadow_stack() || flags.enable_hardware_hvpt() {
return Err(HvError::InvalidParameter);
}

let mut gvsm_state = self.vp.partition.guest_vsm.write();

match *gvsm_state {
GuestVsmState::NotPlatformSupported => return Err(HvError::AccessDenied),
GuestVsmState::NotGuestEnabled => (),
GuestVsmState::Enabled { vtl1: _ } => {
// VTL 1 cannot be already enabled
return Err(HvError::VtlAlreadyEnabled);
}
}

self.vp.partition.hcl.enable_partition_vtl(
target_vtl,
// These flags are managed and enforced internally; CVMs can't rely
// on the hypervisor
0.into(),
)?;

*gvsm_state = GuestVsmState::Enabled {
vtl1: GuestVsmVtl1State::HardwareCvm {
state: crate::HardwareCvmVtl1State {
mbec_enabled: flags.enable_mbec(),
..Default::default()
},
},
};

let protector = self
.vp
.partition
.isolated_memory_protector
.as_ref()
.expect("exists for a cvm");

// Grant VTL 1 access to lower VTL memory
tracing::debug!("Granting VTL 1 access to lower VTL memory");
protector.change_default_vtl_protections(
GuestVtl::Vtl1,
hvdef::HV_MAP_GPA_PERMISSIONS_ALL,
self.vp,
)?;

tracing::debug!("Successfully granted vtl 1 access to lower vtl memory");

tracing::info!("Enabled vtl 1 on the partition");

Ok(())
}
}

impl<T, B: HardwareIsolatedBacking> UhHypercallHandler<'_, '_, T, B> {
fn validate_register_access(
&mut self,
Expand Down Expand Up @@ -1055,6 +982,80 @@ where
}
}

impl<'b, T, B: HardwareIsolatedBacking> hv1_hypercall::EnablePartitionVtl
for UhHypercallHandler<'_, 'b, T, B>
where
UhProcessor<'b, B>: TlbFlushLockAccess,
{
fn enable_partition_vtl(
&mut self,
partition_id: u64,
target_vtl: Vtl,
flags: hvdef::hypercall::EnablePartitionVtlFlags,
) -> HvResult<()> {
if partition_id != hvdef::HV_PARTITION_ID_SELF {
return Err(HvError::InvalidPartitionId);
}

let target_vtl = GuestVtl::try_from(target_vtl).map_err(|_| HvError::AccessDenied)?;
if target_vtl != GuestVtl::Vtl1 {
return Err(HvError::AccessDenied);
}

if flags.enable_supervisor_shadow_stack() || flags.enable_hardware_hvpt() {
return Err(HvError::InvalidParameter);
}

let mut gvsm_state = self.vp.partition.guest_vsm.write();

match *gvsm_state {
GuestVsmState::NotPlatformSupported => return Err(HvError::AccessDenied),
GuestVsmState::NotGuestEnabled => (),
GuestVsmState::Enabled { vtl1: _ } => {
// VTL 1 cannot be already enabled
return Err(HvError::VtlAlreadyEnabled);
}
}

self.vp.partition.hcl.enable_partition_vtl(
target_vtl,
// These flags are managed and enforced internally; CVMs can't rely
// on the hypervisor
0.into(),
)?;

*gvsm_state = GuestVsmState::Enabled {
vtl1: GuestVsmVtl1State::HardwareCvm {
state: crate::HardwareCvmVtl1State {
mbec_enabled: flags.enable_mbec(),
..Default::default()
},
},
};

let protector = self
.vp
.partition
.isolated_memory_protector
.as_ref()
.expect("exists for a cvm");

// Grant VTL 1 access to lower VTL memory
tracing::debug!("Granting VTL 1 access to lower VTL memory");
protector.change_default_vtl_protections(
GuestVtl::Vtl1,
hvdef::HV_MAP_GPA_PERMISSIONS_ALL,
self.vp,
)?;

tracing::debug!("Successfully granted vtl 1 access to lower vtl memory");

tracing::info!("Enabled vtl 1 on the partition");

Ok(())
}
}

impl<T, B: HardwareIsolatedBacking>
hv1_hypercall::EnableVpVtl<hvdef::hypercall::InitialVpContextX64>
for UhHypercallHandler<'_, '_, T, B>
Expand Down
12 changes: 0 additions & 12 deletions openhcl/virt_mshv_vtl/src/processor/snp/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -636,7 +636,6 @@ impl<T: CpuIo> UhHypercallHandler<'_, '_, T, SnpBacked> {
hv1_hypercall::HvSetVpRegisters,
hv1_hypercall::HvModifyVtlProtectionMask,
hv1_hypercall::HvX64TranslateVirtualAddress,
hv1_hypercall::HvX64StartVirtualProcessor,
],
);

Expand Down Expand Up @@ -2168,17 +2167,6 @@ impl UhProcessor<'_, SnpBacked> {
}
}

impl<T: CpuIo> hv1_hypercall::EnablePartitionVtl for UhHypercallHandler<'_, '_, T, SnpBacked> {
fn enable_partition_vtl(
&mut self,
partition_id: u64,
target_vtl: Vtl,
flags: hvdef::hypercall::EnablePartitionVtlFlags,
) -> hvdef::HvResult<()> {
self.hcvm_enable_partition_vtl(partition_id, target_vtl, flags)
}
}

impl<T: CpuIo> hv1_hypercall::VtlSwitchOps for UhHypercallHandler<'_, '_, T, SnpBacked> {
fn advance_ip(&mut self) {
let is_64bit = self.vp.long_mode(self.intercepted_vtl);
Expand Down
5 changes: 2 additions & 3 deletions openhcl/virt_mshv_vtl/src/processor/tdx/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2720,11 +2720,10 @@ impl<T: CpuIo> UhHypercallHandler<'_, '_, T, TdxBacked> {
hv1_hypercall::HvPostMessage,
hv1_hypercall::HvSignalEvent,
hv1_hypercall::HvExtQueryCapabilities,
// TODO TDX: copied from SNP, enable individually as needed.
hv1_hypercall::HvGetVpRegisters,
hv1_hypercall::HvSetVpRegisters,
// hv1_hypercall::HvEnablePartitionVtl,
// hv1_hypercall::HvX64EnableVpVtl,
hv1_hypercall::HvEnablePartitionVtl,
hv1_hypercall::HvX64EnableVpVtl,
// hv1_hypercall::HvVtlCall,
// hv1_hypercall::HvVtlReturn,
hv1_hypercall::HvModifyVtlProtectionMask,
Expand Down