virt_mshv_vtl: Add vtl1_active:bool to CvmVpState and check it for vtl call/return

openhcl/virt_mshv_vtl/src/lib.rs

@@ -345,6 +345,8 @@ pub struct UhCvmVpState {
     hv: VtlArray<ProcessorVtlHv, 2>,
     /// LAPIC state.
     lapics: VtlArray<LapicState, 2>,
+    /// Whether VTL 1 has been started on this VP.
+    vtl1_active: bool,
 }
 
 #[cfg(guest_arch = "x86_64")]
@@ -390,6 +392,7 @@ impl UhCvmVpState {
             exit_vtl: GuestVtl::Vtl0,
             hv,
             lapics,
+            vtl1_active: false,
         })
     }
 }

openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs

@@ -840,9 +840,9 @@ impl<T, B: HardwareIsolatedBacking> hv1_hypercall::VtlCall for UhHypercallHandle
                 self.intercepted_vtl
             );
             false
-        } else if !*self.vp.cvm_vp_inner().vtl1_enabled.lock() {
-            // VTL 1 must be enabled on the vp
-            tracelimit::warn_ratelimited!("vtl call not allowed because vtl 1 is not enabled");
+        } else if !self.vp.backing.cvm_state().vtl1_active {
+            // VTL 1 must be active on the vp
+            tracelimit::warn_ratelimited!("vtl call not allowed because vtl 1 is not active");
             false
         } else {
             true
@@ -1532,10 +1532,12 @@ impl<B: HardwareIsolatedBacking> UhProcessor<'_, B> {
                             // not be desirable.
 
                             self.backing.cvm_state_mut().exit_vtl = GuestVtl::Vtl1;
+                            self.backing.cvm_state_mut().vtl1_active = true;
                         }
                     }
                     GuestVtl::Vtl1 => {
                         self.backing.cvm_state_mut().exit_vtl = GuestVtl::Vtl1;
+                        self.backing.cvm_state_mut().vtl1_active = true;
                     }
                 }
             }

openhcl/virt_mshv_vtl/src/processor/mod.rs

@@ -282,6 +282,8 @@ pub trait HardwareIsolatedBacking: Backing {
     /// for each CPU.
     fn shared_pages_required_per_cpu() -> u64;
     /// Gets CVM specific VP state.
+    fn cvm_state(&self) -> &crate::UhCvmVpState;
+    /// Gets CVM specific VP state.
     fn cvm_state_mut(&mut self) -> &mut crate::UhCvmVpState;
     /// Gets CVM specific partition state.
     fn cvm_partition_state(shared: &Self::Shared) -> &crate::UhCvmPartitionState;

openhcl/virt_mshv_vtl/src/processor/snp/mod.rs

@@ -140,6 +140,10 @@ impl HardwareIsolatedBacking for SnpBacked {
         UhDirectOverlay::Count as u64
     }
 
+    fn cvm_state(&self) -> &UhCvmVpState {
+        &self.cvm
+    }
+
     fn cvm_state_mut(&mut self) -> &mut UhCvmVpState {
         &mut self.cvm
     }

openhcl/virt_mshv_vtl/src/processor/tdx/mod.rs

@@ -486,6 +486,10 @@ impl HardwareIsolatedBacking for TdxBacked {
         UhDirectOverlay::Count as u64
     }
 
+    fn cvm_state(&self) -> &UhCvmVpState {
+        &self.cvm
+    }
+
     fn cvm_state_mut(&mut self) -> &mut UhCvmVpState {
         &mut self.cvm
     }