Add tohost and adapt existing tests

* cv32e20/bsp/crt0.s: add tohost symbol declaration
* cv32e20/bsp/link.ld: add tohost symbol linking address
* cv32e20/bsp/syscalls.c: add tohost store in the exit function
* cv32e20/env/corev-dv/cv32e20_instr_gen_config.sv: add rule to enforce
not ZERO reg used in the scratch reg. This constraint was already
implemented but not working with vsim
* cv32e20/env/uvme/uvme_cv32e20_env.sv: add mechanism to load symbols
from the binary for the execution exit.
* cv32e20/env/uvme/vseq/uvme_cv32e20_vp_status_flags_seq.sv: Adapt code
to host format ( {exit_value, 1} )
* cv32e40p/env/uvme/uvme_rv32isa_covg_trn.sv: substitute
uvm_objects_utils(begin/end) for a simple uvm_object_utils
* lib/corev-dv/corev_asm_program_gen.sv: delete wfi for locking the core
and add tohost mechanism
* lib/uvm_agents/uvma_obi_memory/src/comps/uvma_obi_memory_mon.sv: vsim
complaining for using passive_mp
* lib/uvm_libs/uvml_sb/uvml_sb_cntxt.sv: delete T_TRN type for event as
it causes vsim to fail simulation
* mk/Common.mk: add compilation for elfloader vendor
* mk/uvmt/vsim.mk: add comilation for elfloader vendor and delete
clean_riscv-dv on each corev-dv generation
* vendor/elfloader/Makefile: add elfloader vendor
* vendor/elfloader/elfloader.cc: add elfloader vendor
* lib/corev-dv/corev_asm_program_gen.sv: delete wfi and add syscall on ecall
* cv32e20/tests/programs/custom/riscv_arithmetic_basic_test_*: change align of trap handler to 8

Author: Mario

cv32e20/bsp/Makefile

@@ -10,25 +10,29 @@ RISCV            ?= $(CV_SW_TOOLCHAIN)
 RISCV_EXE_PREFIX ?= $(RISCV)/bin/riscv32-unknown-elf-
 RISCV_GCC = $(RISCV_EXE_PREFIX)gcc
 RISCV_AR = $(RISCV_EXE_PREFIX)ar
-SRC = crt0.S handlers.S syscalls.c vectors.S
-OBJ = crt0.o handlers.o syscalls.o vectors.o
-LIBCV-VERIF = libcv-verif.a 
+C_FILES = syscalls_kernel.c csr.c csr.h syscalls.c syscalls.h
+SRC = crt0.S handlers.S syscalls.c syscalls_kernel.c vectors.S csr.c
+OBJ = crt0.o handlers.o syscalls.o syscalls_kernel.o vectors.o csr.o
+LIBCV-VERIF = libcv-verif.a
 CFLAGS ?= -Os -g -static -mabi=ilp32 -march=$(CV_SW_MARCH) -Wall -pedantic
 
 all: $(LIBCV-VERIF)
 
-$(LIBCV-VERIF): $(OBJ) 
+$(LIBCV-VERIF): $(OBJ)
 	$(RISCV_AR) rcs $@ $(OBJ)
 
 %.o : %.c
 	$(RISCV_GCC) $(CFLAGS) -c $< -o $@
-	
+
 %.o : %.S
 	$(RISCV_GCC) $(CFLAGS) -c $< -o $@
 
 clean:
 	rm -f $(OBJ) $(LIBCV-VERIF)
 
+format:
+	clang-format -i --style=llvm $(C_FILES)
+
 
 vars:
 	@echo "make bsp variables:"

cv32e20/bsp/crt0.S

@@ -55,7 +55,7 @@ _start:
 	li a2, 0
 
 	call main
-	tail exit
+	tail _exit
 
 .size  _start, .-_start
 

cv32e20/bsp/csr.c

@@ -0,0 +1,19 @@
+#include "csr.h"
+
+void return_to_machine() {
+  char *argv[] = {"return_to_machine"};
+  execve("return_to_machine", argv, NULL);
+}
+
+inline void set_status_pp(priv_e new_mode) {
+
+  csr_set_mask(mstatus, CSR_MSTATUS_MPP, new_mode);
+  asm volatile("la t0, 1f;"
+               "csrrw t0, mepc, t0;"
+               "mret;"
+               "1:");
+}
+
+void test_fail() { exit(1); }
+
+void test_pass() { exit(0); }

cv32e20/bsp/csr.h

@@ -0,0 +1,93 @@
+#ifndef CSR_H
+#define CSR_H
+
+#include "csr_encoding.h"
+#include "syscalls.h"
+#include <assert.h>
+#include <errno.h>
+#include <machine/syscall.h>
+#include <newlib.h>
+#include <sys/stat.h>
+#include <sys/timeb.h>
+#include <sys/times.h>
+#include <sys/utime.h>
+#include <unistd.h>
+
+#undef errno
+#ifndef __ASSEMBLER__
+
+extern int errno;
+
+typedef enum priv_enum { PRIV_M = 0x3, PRIV_S = 0x1, PRIV_U = 0x0 } priv_e;
+
+inline const char *priv_to_string(priv_e val) {
+  switch (val) {
+  case PRIV_M:
+    return "PRIV_M";
+  case PRIV_S:
+    return "PRIV_S";
+  case PRIV_U:
+    return "PRIV_U";
+  default:
+    return "PRIV";
+  }
+}
+
+void set_status_pp(priv_e new_mode);
+
+void return_to_machine();
+
+void test_fail();
+
+void test_pass();
+
+#define BITS2SHIFT(mask) (mask & -mask)
+
+#define csr_read(reg)                                                          \
+  ({                                                                           \
+    unsigned long __tmp;                                                       \
+    asm volatile("csrr %0, " #reg : "=r"(__tmp));                              \
+    __tmp;                                                                     \
+  })
+
+#define csr_write(reg, val) ({ asm volatile("csrw " #reg ", %0" ::"rK"(val)); })
+
+#define csr_swap(reg, val)                                                     \
+  ({                                                                           \
+    unsigned long __tmp;                                                       \
+    asm volatile("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val));          \
+    __tmp;                                                                     \
+  })
+
+#define csr_set(reg, bit)                                                      \
+  ({                                                                           \
+    unsigned long __tmp;                                                       \
+    asm volatile("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit));          \
+    __tmp;                                                                     \
+  })
+
+#define csr_clear(reg, bit)                                                    \
+  ({                                                                           \
+    unsigned long __tmp;                                                       \
+    asm volatile("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit));          \
+    __tmp;                                                                     \
+  })
+
+#define csr_clear_mask(reg, mask) csr_clear(reg, BITS2SHIFT(mask))
+
+#define csr_set_mask(reg, mask, value)                                         \
+  ({                                                                           \
+    unsigned long __tmp = csr_read(reg);                                       \
+    __tmp = __tmp & mask;                                                      \
+    __tmp |= (value << BITS2SHIFT(mask));                                      \
+    csr_write(reg, __tmp);                                                     \
+    __tmp;                                                                     \
+  })
+
+#define rdtime() csr_read(time)
+#define rdcycle() csr_read(cycle)
+#define rdinstret() csr_read(instret)
+
+#endif
+
+#endif