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1 parent a2d201d commit f15a4b3Copy full SHA for f15a4b3
cv32e40p/env/corev-dv/cv32e40p_load_store_instr_lib.sv
@@ -17,7 +17,7 @@
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class cv32e40p_multi_page_load_store_instr_stream extends riscv_multi_page_load_store_instr_stream;
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- rand bit has_taken_avail_comp_reg[];
+ rand int has_taken_avail_comp_reg[];
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riscv_reg_t s0_a5_avail_regs[];
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constraint with_compress_instructions_c {
@@ -48,7 +48,7 @@
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class cv32e40p_mem_region_stress_test extends riscv_mem_region_stress_test;
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