DSim-compatible updates for CV32E20

.gitignore

@@ -36,25 +36,8 @@ waves.shm/
 *.log
 stdout.txt
 .vscode
-cva6/tests/riscv-compliance/
-cva6/tests/riscv-arch-test/
-cva6/tests/riscv-tests/
-cva6/tests/riscv-isa-sim/
-cva6/sim/dv/
-cva6/sim/vcs_results
-cva6/sim/verilator_work
-cva6/sim/out_*
-cva6/sim/Mem_init.txt
-cva6/sim/*.txt
-cva6/sim/trace*
-cva6/sim/simv*
-cva6/sim/ucli.key
-cva6/sim/.inter*
-cva6/sim/.vcs*
-cva6/sim/inter*
-cva6/sim/novas*
-cva6/sim/verdiLog
-cva6/sim/Verdi.ses*
+cva6
+cv32e20
 riviera_results/
 */vendor_lib/dpi_dasm_spike/
 */vendor_lib/verilab/svlib/

LICENSE.md

@@ -1,23 +1,34 @@
 # Solderpad Hardware Licence Version 2.0:  https://solderpad.org/licenses/SHL-2.0/
 
-This licence (the “Licence”) operates as a wraparound licence to the Apache License Version 2.0 (the “Apache License”) and grants to You the rights, and imposes the obligations, set out in the Apache License (which can be found here: http://apache.org/licenses/LICENSE-2.0), with the following extensions. It must be read in conjunction with the Apache License. Section 1 below modifies definitions in the Apache License, and section 2 below replaces sections 2 of the Apache License. You may, at your option, choose to treat any Work released under this License as released under the Apache License (thus ignoring all sections written below entirely). Words in _italics_ indicate changes from the Apache License, but are indicative and not to be taken into account in interpretation.
+This licence (the “Licence”) operates as a wraparound licence to the Apache License Version 2.0
+(the “Apache License”) and grants to You the rights, and imposes the obligations, set out in the Apache License
+(which can be found here: http://apache.org/licenses/LICENSE-2.0), with the following extensions.
+It must be read in conjunction with the Apache License.
+Section 1 below modifies definitions in the Apache License, and section 2 below replaces sections 2 of the Apache License.
+You may, at your option, choose to treat any Work released under this License as released under the Apache License
+(thus ignoring all sections written below entirely).
+Words in _italics_ indicate changes from the Apache License, but are indicative and not to be taken into account in interpretation.
 
-1. The definitions set out in the Apache License are modified as follows:
+## The definitions set out in the Apache License are modified as follows:
 
-Copyright any reference to ‘copyright’ (whether capitalised or not) includes ‘Rights’ (as defined below).
+- Copyright any reference to ‘copyright’ (whether capitalised or not) includes ‘Rights’ (as defined below).
 
-Contribution also includes any _design_, as well as any work of authorship.
+- Contribution also includes any _design_, as well as any work of authorship.
 
-Derivative Works shall not include works that remain _reversibly_ separable from, or merely link (or bind by name) or _physically connect to or interoperate with_ the interfaces of the Work and Derivative Works thereof.
+- Derivative Works shall not include works that remain _reversibly_ separable from, or merely link (or bind by name) or _physically connect to or interoperate with_ the interfaces of the Work and Derivative Works thereof.
 
-Object form shall mean any form resulting from mechanical transformation or translation of a Source form or the application of a Source form to physical material, including but not limited to compiled object code, generated documentation, _the instantiation of a hardware design or physical object and conversions to other media types, including intermediate forms such as bytecodes, FPGA bitstreams, moulds, artwork and semiconductor topographies (mask works)_.
+- Object form shall mean any form resulting from mechanical transformation or translation of a Source form or the application of a Source form to physical material, including but not limited to compiled object code, generated documentation, _the instantiation of a hardware design or physical object and conversions to other media types, including intermediate forms such as bytecodes, FPGA bitstreams, moulds, artwork and semiconductor topographies (mask works)_.
 
-Rights means copyright and any similar right including design right (whether registered or unregistered), semiconductor topography (mask) rights and database rights (but excluding Patents and Trademarks).
+- Rights means copyright and any similar right including design right (whether registered or unregistered), semiconductor topography (mask) rights and database rights (but excluding Patents and Trademarks).
 
-Source form shall mean the preferred form for making modifications, including but not limited to source code, _net lists, board layouts, CAD files_, documentation source, and configuration files.
+- Source form shall mean the preferred form for making modifications, including but not limited to source code, _net lists, board layouts, CAD files_, documentation source, and configuration files.
 
-Work also includes a _design_ or work of authorship, whether in Source form or _other_ Object form.
+- Work also includes a _design_ or work of authorship, whether in Source form or _other_ Object form.
 
-2. Grant of Licence
+## Grant of Licence
 
-2.1 Subject to the terms and conditions of this License, each Contributor hereby grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable license under the Rights to reproduce, prepare Derivative Works of, _make, adapt, repair_, publicly display, publicly perform, sublicense, and distribute the Work and such Derivative Works in Source or Object form _and do anything in relation to the Work as if the Rights did not exist_.
+Subject to the terms and conditions of this License, each Contributor hereby grants to You a
+perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable license under the
+Rights to reproduce, prepare Derivative Works of, _make, adapt, repair_, publicly display,
+publicly perform, sublicense, and distribute the Work and such Derivative Works in Source
+or Object form _and do anything in relation to the Work as if the Rights did not exist_.

lib/uvm_agents/uvma_core_cntrl/uvma_core_cntrl_tdefs.sv

@@ -671,7 +671,7 @@ typedef enum {
 typedef struct packed {
     // Major mode enable controls
    bit                          enabled;
-   bit                          is_active;
+   uvm_active_passive_enum      is_active;
    bit                          scoreboard_enabled;
    bit                          disable_all_csr_checks;
    bit [CSR_MASK_WL-1:0]        disable_csr_check_mask;

lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_vp_base_seq.sv

@@ -1,20 +1,20 @@
-// 
+//
 // Copyright 2021 OpenHW Group
 // Copyright 2021 Silicon Labs
 // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
-// 
+//
 // Licensed under the Solderpad Hardware License v 2.1 (the "License"); you may
 // not use this file except in compliance with the License, or, at your option,
 // the Apache License version 2.0. You may obtain a copy of the License at
-// 
+//
 //     https://solderpad.org/licenses/SHL-2.1/
-// 
+//
 // Unless required by applicable law or agreed to in writing, any work
 // distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
 // WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
 // License for the specific language governing permissions and limitations
 // under the License.
-// 
+//
 
 `ifndef __UVMA_OBI_MEMORY_VP_BASE_SEQ_SV__
 `define __UVMA_OBI_MEMORY_VP_BASE_SEQ_SV__
@@ -28,19 +28,18 @@ virtual class uvma_obi_memory_vp_base_seq_c extends uvma_obi_memory_slv_base_seq
 
    uvma_obi_memory_mon_trn_c       mon_trn_q[$]; // Used to add transactions to execute (monitored requests)
 
-   // Base address of this virtual peripheral, used to generated offset index for multi-register
-   // virtual perhipeerals
-   // Should be filled in during registration
-   bit [31:0] start_address; 
+   // Base address of this virtual peripheral, used to generated offset index for multi-register virtual perhiperals
+   // Should be filled in during registration (which is typically done on the env class)
+   bit [31:0] start_address;
 
    `uvm_field_utils_begin(uvma_obi_memory_vp_base_seq_c)
    `uvm_field_utils_end
-      
+
    /**
     * Default constructor.
     */
    extern function new(string name="uvma_obi_memory_vp_base_seq_c");
-   
+
    /**
     * Simple loop that is triggered externally when the main slave sequence detects an address range
     * claimed by this virtual peripheral
@@ -66,9 +65,9 @@ endclass : uvma_obi_memory_vp_base_seq_c
 
 
 function uvma_obi_memory_vp_base_seq_c::new(string name="uvma_obi_memory_vp_base_seq_c");
-   
+
    super.new(name);
-   
+
 endfunction : new
 
 
@@ -77,35 +76,38 @@ task uvma_obi_memory_vp_base_seq_c::body();
    forever begin
       wait (mon_trn_q.size());
 
-      vp_body(mon_trn_q.pop_front());   
+      vp_body(mon_trn_q.pop_front());
    end
 
 endtask : body
 
 
+// get_vp_index() returns the "register number" from a given virtual peripheral.
+// Each 32-bit "register" is essentially index from the start_address
 function int unsigned uvma_obi_memory_vp_base_seq_c::get_vp_index(uvma_obi_memory_mon_trn_c mon_trn);
 
    int unsigned index;
 
    // Fatal error if the address in the incoming transaction is less than the configured base address
    if (mon_trn.address < start_address) begin
-      `uvm_fatal("FATAL", $sformatf("%s: get_vp_index(), mon_trn.address 0x%08x is less than start address 0x%08x", 
-                                    this.get_name(), 
+      `uvm_fatal("FATAL", $sformatf("%s: get_vp_index(), mon_trn.address 0x%08x is less than start address 0x%08x",
+                                    this.get_name(),
                                     mon_trn.address,
                                     start_address));
-   end                                   
+   end
 
    index = (mon_trn.address - start_address) >> 2;
 
    // Fatal if the index is greater than expected
    if (index >= get_num_words()) begin
-      `uvm_fatal("FATAL", $sformatf("%s: get_vp_index(), mon_trn.address 0x%08x base address 0x%08x, should only have %0s vp registers", 
-                                    this.get_name(), 
+      `uvm_fatal("FATAL", $sformatf("%s: get_vp_index(), mon_trn.address 0x%08x base address 0x%08x, should only have %0s vp registers",
+                                    this.get_name(),
                                     mon_trn.address,
                                     start_address,
                                     get_num_words()));
    end
 
+   `uvm_info("uvma_obi_memory_vp_base_seq.sv", $sformatf("return index = %0d", index), UVM_DEBUG)
    return index;
 
 endfunction : get_vp_index

lib/uvm_agents/uvma_rvfi/uvma_rvfi_tdefs.sv

@@ -33,7 +33,7 @@ typedef struct packed {
    bit [MAX_XLEN-1:0]         trap;
    bit [MAX_XLEN-1:0]         halt;
    bit [MAX_XLEN-1:0]         intr;
-   bit [MAX_XLEN-1:0]         mode;
+   uvma_rvfi_mode             mode;
    bit [MAX_XLEN-1:0]         ixl;
    bit [MAX_XLEN-1:0]         dbg;
    bit [MAX_XLEN-1:0]         dbg_mode;

lib/uvm_components/uvmc_rvfi_reference_model/uvmc_rvfi_spike.sv

@@ -46,7 +46,12 @@ class uvmc_rvfi_spike#(int ILEN=DEFAULT_ILEN,
 
        st = cfg.to_struct();
 
-       rvfi_initialize_spike(cfg.core_name, st);
+       if ($test$plusargs("USE_ISS")) begin
+           rvfi_initialize_spike(cfg.core_name, st);
+       end
+       else begin
+           `uvm_info("UVMC_RVFI_SPIKE", "Skipping rvfi_initialize_spike()", UVM_NONE)
+       end
    endfunction : build_phase
 
    /**
@@ -59,7 +64,9 @@ class uvmc_rvfi_spike#(int ILEN=DEFAULT_ILEN,
 
        s_core = t.seq2rvfi();
 
-       rvfi_spike_step(s_core, s_reference_model);
+       if ($test$plusargs("USE_ISS")) begin
+           rvfi_spike_step(s_core, s_reference_model);
+       end
 
        t_reference_model = new("t_reference_model");
        t_reference_model.rvfi2seq(s_reference_model);

lib/uvm_components/uvmc_rvfi_scoreboard/uvmc_rvfi_scoreboard.sv

@@ -33,6 +33,7 @@ class uvmc_rvfi_scoreboard_c#(int ILEN=DEFAULT_ILEN,
    uvma_core_cntrl_cfg_c         cfg;
    bit [XLEN-1:0] sentinel_value;
    bit            sentinel_enable;
+   string         info_tag = "UVMC_RVFI_SCOREBOARD";
 
    `uvm_component_utils_begin(uvmc_rvfi_scoreboard_c)
       `uvm_field_object(cfg,         UVM_DEFAULT | UVM_REFERENCE)
@@ -102,20 +103,26 @@ task uvmc_rvfi_scoreboard_c::run_phase(uvm_phase phase);
     t_core = new("t_core");
 
     sim_finished = 0;
-    phase.raise_objection(this);
-    while (!sim_finished) begin
-        @(reference_model.size > 0)
-        while (reference_model.size > 0 && !sim_finished)
-        begin
-            t_reference_model = reference_model.pop_front();
-            t_core = core.pop_front();
-            rvfi_compare(t_core.seq2rvfi(), t_reference_model.seq2rvfi());
-
-            if (t_reference_model.halt || (sentinel_enable && (sentinel_value == t_reference_model.insn)))
-                sim_finished = 1;
+    //FIXME: this needs to be part of the ENV Cfg
+    if ($test$plusargs("USE_ISS")) begin
+        phase.raise_objection(this);
+        while (!sim_finished) begin
+            @(reference_model.size > 0)
+            while (reference_model.size > 0 && !sim_finished)
+            begin
+                t_reference_model = reference_model.pop_front();
+                t_core = core.pop_front();
+                rvfi_compare(t_core.seq2rvfi(), t_reference_model.seq2rvfi());
+
+                if (t_reference_model.halt || (sentinel_enable && (sentinel_value == t_reference_model.insn)))
+                    sim_finished = 1;
+            end
         end
+        phase.drop_objection(this);
+    end
+    else begin
+        `uvm_info(info_tag, $sformatf("The RVFI_SCOREBOARD is not enabled."), UVM_NONE)
     end
-    phase.drop_objection(this);
 
 endtask : run_phase
 
@@ -134,11 +141,11 @@ endfunction : write_rvfi_instr_core
 function void uvmc_rvfi_scoreboard_c::get_and_set_cfg();
 
    if (uvm_config_db#(uvma_core_cntrl_cfg_c)::get(this, "", "cfg", cfg)) begin
-      `uvm_info("CFG", $sformatf("Found configuration handle:\n%s", cfg.sprint()), UVM_DEBUG)
+      `uvm_info(info_tag, $sformatf("Found configuration handle:\n%s", cfg.sprint()), UVM_DEBUG)
       uvm_config_db#(uvma_core_cntrl_cfg_c)::set(this, "*", "cfg", cfg);
    end
    else begin
-      `uvm_fatal("CFG", $sformatf("%s: Could not find configuration handle", this.get_full_name()));
+      `uvm_fatal(info_tag, $sformatf("%s: Could not find configuration handle", this.get_full_name()));
    end
 
 endfunction : get_and_set_cfg

lib/uvm_components/uvmc_rvfi_scoreboard/uvmc_rvfi_scoreboard_utils.sv

@@ -204,6 +204,9 @@ import "DPI-C" function void spike_set_params_from_file(string paramFilePath);
 
             `uvm_info("spike_tandem", {cause_str}, UVM_NONE);
             `uvm_info("spike_tandem", {instr_rm}, UVM_NONE);
+            // TODO: this is redundant as the UVM messaging service will
+            // terminate a simulation after N errors (N is typically 5 in
+            // core-v-verif).
             if (instr_mismatch_count >= INSTR_MISMATCH_MAX) begin
                 `uvm_fatal("spike_tandem", {instr_core, " <- CORE\n"});
             end

mk/Common.mk

@@ -712,8 +712,25 @@ SVLIB_LIB    = $(SVLIB_PKG)/../svlib_dpi.so
 SVLIB_CXX    = gcc
 
 svlib: $(SVLIB_PKG)
-	$(SVLIB_CXX) $(SVLIB_CFLAGS) $(SVLIB) $(SVLIB_SRC) -I$(DPI_INCLUDE) -o $(SVLIB_LIB)
+	@echo "$(BANNER)"
+	@echo "Building $(SVLIB_PKG)"
+	@echo "$(BGANNER)"
+	$(SVLIB_CXX) $(SVLIB_CFLAGS) $(SVLIB_SRC) -I$(DPI_INCLUDE) -o $(SVLIB_LIB)
+
+###############################################################################
+# Build Stub for RVVI-API (in the case where ImperasDV is not available)
+RVVI_STUB_SRC    = $(RVVI_STUB)/rvviApiStubs.c
+RVVI_STUB_CFLAGS = -shared -fPIC
+RVVI_STUB_LIB    = $(RVVI_STUB)/rvviApi.so
+RVVI_STUB_CXX    = gcc
 
+rvvi_stub:
+	@echo "$(BANNER)"
+	@echo "Building $(RVVI_STUB)"
+	@echo "$(BANNER)"
+	$(RVVI_STUB_CXX) $(RVVI_STUB_CFLAGS) $(RVVI_STUB_SRC) -I$(DPI_INCLUDE) -o $(RVVI_STUB_LIB)
+
+###############################################################################
 .PHONY: firmware-clean
 firmware-clean:
 	rm -vrf $(addprefix $(FIRMWARE)/firmware., elf bin hex map) \