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1 | 1 | /*
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2 |
| - * Copyright (c) 2021, Oracle and/or its affiliates. All rights reserved. |
| 2 | + * Copyright (c) 2021, 2025, Oracle and/or its affiliates. All rights reserved. |
3 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 | 4 | *
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5 | 5 | * This code is free software; you can redistribute it and/or modify it
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@@ -139,9 +139,10 @@ public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
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139 | 139 | // indices v * 2, v * 2 + 1 until we reach the element width equal to Byte.SIZE
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140 | 140 | if (eKind.getSizeInBytes() == AArch64Kind.QWORD.getSizeInBytes()) {
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141 | 141 | masm.neon.shlVVI(vSize, ElementSize.DoubleWord, xtmp1Reg, currentIdxReg, 1);
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142 |
| - masm.neon.shlVVI(vSize, ElementSize.DoubleWord, xtmp2Reg, xtmp1Reg, Integer.SIZE); |
| 142 | + masm.neon.moveVV(vSize, xtmp2Reg, xtmp1Reg); |
| 143 | + masm.neon.orrVI(vSize, ElementSize.Word, xtmp2Reg, 1); |
| 144 | + masm.neon.shlVVI(vSize, ElementSize.DoubleWord, xtmp2Reg, xtmp2Reg, Integer.SIZE); |
143 | 145 | masm.neon.orrVVV(vSize, xtmp1Reg, xtmp1Reg, xtmp2Reg);
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144 |
| - masm.neon.orrVI(vSize, ElementSize.DoubleWord, xtmp1Reg, 1L << Integer.SIZE); |
145 | 146 | currentIdxReg = xtmp1Reg;
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146 | 147 | eKind = AArch64Kind.DWORD;
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147 | 148 | }
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