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1 parent 74b548c commit 60bd6c1

16 files changed

+439
-393
lines changed

hdl/ip/vhd/i2c/common/BUCK

+19
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
load("//tools:hdl.bzl", "vhdl_unit", "vunit_sim")
2+
3+
vhdl_unit(
4+
name = "i2c_common_pkg",
5+
srcs = ["i2c_common_pkg.vhd"],
6+
visibility = ['PUBLIC']
7+
)
8+
9+
vhdl_unit(
10+
name = "i2c_cmd_vc",
11+
srcs = ["sims/i2c_cmd_vc.vhd", "sims/i2c_cmd_vc_pkg.vhd"],
12+
visibility = ['PUBLIC']
13+
)
14+
15+
vhdl_unit(
16+
name = "i2c_target_vc",
17+
srcs = ["sims/i2c_target_vc.vhd", "sims/i2c_target_vc_pkg.vhd"],
18+
visibility = ['PUBLIC']
19+
)

hdl/ip/vhd/i2c/i2c_common_pkg.vhd hdl/ip/vhd/i2c/common/i2c_common_pkg.vhd

+1-2
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,6 @@
66

77
library ieee;
88
use ieee.std_logic_1164.all;
9-
use ieee.numeric_std.all;
109

1110
package i2c_common_pkg is
1211

@@ -48,7 +47,7 @@ package i2c_common_pkg is
4847
op : op_t;
4948
addr : std_logic_vector(6 downto 0);
5049
reg : std_logic_vector(7 downto 0);
51-
len : unsigned(7 downto 0);
50+
len : std_logic_vector(7 downto 0);
5251
end record;
5352
constant CMD_RESET : cmd_t := (READ, (others => '0'), (others => '0'), (others => '0'));
5453

File renamed without changes.

hdl/ip/vhd/i2c/sims/i2c_cmd_vc_pkg.vhd hdl/ip/vhd/i2c/common/sims/i2c_cmd_vc_pkg.vhd

+9-5
Original file line numberDiff line numberDiff line change
@@ -70,11 +70,15 @@ package body i2c_cmd_vc_pkg is
7070
-- breaking down our type since we can't push enums in VUnit
7171
is_read := false when cmd.op = WRITE else true;
7272
is_random := true when cmd.op = RANDOM_READ else false;
73-
push(msg, is_read);
74-
push(msg, is_random);
75-
push(msg, cmd.addr);
76-
push(msg, cmd.reg);
77-
push(msg, cmd.len);
73+
74+
-- We break down cmd_t into it's primitive types to push them into the message where we will
75+
-- pop them off when we receive it in order to reconstruct a cmd_t.
76+
-- TODO: implement push/pop for our custom type so we wouldn't have to do this?
77+
push(msg, is_read); -- boolean
78+
push(msg, is_random); -- boolean
79+
push(msg, cmd.addr); -- std_logic_vector
80+
push(msg, cmd.reg); -- std_logic_vector
81+
push(msg, cmd.len); -- std_logic_vector
7882
send(net, i2c_cmd_vc.p_actor, msg);
7983
end;
8084

hdl/ip/vhd/i2c/sims/i2c_peripheral.vhd hdl/ip/vhd/i2c/common/sims/i2c_target_vc.vhd

+12-12
Original file line numberDiff line numberDiff line change
@@ -16,11 +16,11 @@ use vunit_lib.sync_pkg.all;
1616

1717
use work.tristate_if_pkg.all;
1818

19-
use work.i2c_peripheral_pkg.all;
19+
use work.i2c_target_vc_pkg.all;
2020

21-
entity i2c_peripheral is
21+
entity i2c_target_vc is
2222
generic (
23-
i2c_peripheral_vc : i2c_peripheral_t
23+
i2c_target_vc : i2c_target_vc_t
2424
);
2525
port (
2626
-- Tri-state signals to I2C interface
@@ -29,7 +29,7 @@ entity i2c_peripheral is
2929
);
3030
end entity;
3131

32-
architecture model of i2c_peripheral is
32+
architecture model of i2c_target_vc is
3333

3434
type state_t is (
3535
IDLE,
@@ -94,20 +94,20 @@ begin
9494

9595
when START =>
9696
event_msg := new_msg(got_start);
97-
send(net, i2c_peripheral_vc.p_actor, event_msg);
97+
send(net, i2c_target_vc.p_actor, event_msg);
9898
state <= GET_START_BYTE;
9999

100100
when GET_START_BYTE =>
101101
wait on rx_done;
102-
if rx_data(7 downto 1) = address(i2c_peripheral_vc) then
102+
if rx_data(7 downto 1) = address(i2c_target_vc) then
103103
state <= SEND_ACK;
104104
is_read := rx_data(0) = '1';
105105
event_msg := new_msg(address_matched);
106-
send(net, i2c_peripheral_vc.p_actor, event_msg);
106+
send(net, i2c_target_vc.p_actor, event_msg);
107107
else
108108
state <= SEND_NACK;
109109
event_msg := new_msg(address_different);
110-
send(net, i2c_peripheral_vc.p_actor, event_msg);
110+
send(net, i2c_target_vc.p_actor, event_msg);
111111
end if;
112112

113113
when GET_BYTE =>
@@ -126,9 +126,9 @@ begin
126126
end if;
127127

128128
if addr_set then
129-
write_word(memory(i2c_peripheral_vc), to_integer(reg_addr_v), rx_data);
129+
write_word(memory(i2c_target_vc), to_integer(reg_addr_v), rx_data);
130130
event_msg := new_msg(got_byte);
131-
send(net, i2c_peripheral_vc.p_actor, event_msg);
131+
send(net, i2c_target_vc.p_actor, event_msg);
132132
addr_incr <= TRUE;
133133
else
134134
addr_set <= TRUE;
@@ -160,7 +160,7 @@ begin
160160
when GET_STOP =>
161161
wait until (stop_condition or stop_during_write);
162162
event_msg := new_msg(got_stop);
163-
send(net, i2c_peripheral_vc.p_actor, event_msg);
163+
send(net, i2c_target_vc.p_actor, event_msg);
164164
state <= IDLE;
165165
addr_set <= FALSE;
166166
addr_incr <= FALSE;
@@ -212,7 +212,7 @@ begin
212212
tx_bit_count <= to_unsigned(1, tx_bit_count'length);
213213
elsif state = SEND_BYTE then
214214
if tx_bit_count = 0 then
215-
txd := read_word(i2c_peripheral_vc.p_buffer.p_memory_ref, natural(to_integer(reg_addr)), 1);
215+
txd := read_word(i2c_target_vc.p_buffer.p_memory_ref, natural(to_integer(reg_addr)), 1);
216216
else
217217
txd := '1' & tx_data(7 downto 1);
218218
end if;

hdl/ip/vhd/i2c/sims/i2c_peripheral_pkg.vhd hdl/ip/vhd/i2c/common/sims/i2c_target_vc_pkg.vhd

+29-29
Original file line numberDiff line numberDiff line change
@@ -6,14 +6,14 @@
66

77
library ieee;
88
use ieee.std_logic_1164.all;
9-
use ieee.numeric_std.all;
9+
use ieee.numeric_std_unsigned.all;
1010

1111
library vunit_lib;
1212
context vunit_lib.vunit_context;
1313
context vunit_lib.com_context;
1414
context vunit_lib.vc_context;
1515

16-
package i2c_peripheral_pkg is
16+
package i2c_target_vc_pkg is
1717

1818
-- Message definitions
1919
constant got_start : msg_type_t := new_msg_type("got_start");
@@ -24,7 +24,7 @@ package i2c_peripheral_pkg is
2424
constant got_byte : msg_type_t := new_msg_type("got_byte");
2525
constant got_stop : msg_type_t := new_msg_type("got_stop");
2626

27-
type i2c_peripheral_t is record
27+
type i2c_target_vc_t is record
2828
-- private
2929
p_actor : actor_t;
3030
p_buffer : buffer_t;
@@ -33,51 +33,51 @@ package i2c_peripheral_pkg is
3333
P_address : std_logic_vector(6 downto 0);
3434
end record;
3535

36-
constant i2c_peripheral_vc_logger : logger_t := get_logger("work:i2c_peripheral_vc");
36+
constant i2c_target_vc_logger : logger_t := get_logger("work:i2c_peripheral_vc");
3737

38-
impure function new_i2c_peripheral_vc (
39-
name : string;
38+
impure function new_i2c_target_vc (
39+
name : string := "I2C_TARGET_VC";
4040
address : std_logic_vector(6 downto 0) := b"1010101";
41-
logger : logger_t := i2c_peripheral_vc_logger
42-
) return i2c_peripheral_t;
41+
logger : logger_t := i2c_target_vc_logger
42+
) return i2c_target_vc_t;
4343

44-
impure function address (i2c_periph: i2c_peripheral_t) return std_logic_vector;
45-
impure function buf (i2c_periph: i2c_peripheral_t) return buffer_t;
46-
impure function memory (i2c_periph: i2c_peripheral_t) return memory_t;
44+
impure function address (i2c_periph: i2c_target_vc_t) return std_logic_vector;
45+
impure function buf (i2c_periph: i2c_target_vc_t) return buffer_t;
46+
impure function memory (i2c_periph: i2c_target_vc_t) return memory_t;
4747

4848
procedure expect_message (
4949
signal net : inout network_t;
50-
constant vc : i2c_peripheral_t;
50+
constant vc : i2c_target_vc_t;
5151
constant expected_msg : msg_type_t;
5252
);
5353

5454
procedure expect_stop (
5555
signal net : inout network_t;
56-
constant vc : i2c_peripheral_t;
56+
constant vc : i2c_target_vc_t;
5757
);
5858

5959
procedure start_byte_ack (
6060
signal net : inout network_t;
61-
constant vc : i2c_peripheral_t;
61+
constant vc : i2c_target_vc_t;
6262
variable ack : out boolean;
6363
);
6464

6565
procedure check_written_byte (
6666
signal net : inout network_t;
67-
constant vc : i2c_peripheral_t;
67+
constant vc : i2c_target_vc_t;
6868
variable data : std_logic_vector;
69-
variable addr : unsigned;
69+
variable addr : std_logic_vector;
7070
);
7171

7272
end package;
7373

74-
package body i2c_peripheral_pkg is
74+
package body i2c_target_vc_pkg is
7575

76-
impure function new_i2c_peripheral_vc (
77-
name : string;
76+
impure function new_i2c_target_vc (
77+
name : string := "I2C_TARGET_VC";
7878
address : std_logic_vector(6 downto 0) := b"1010101";
79-
logger : logger_t := i2c_peripheral_vc_logger
80-
) return i2c_peripheral_t is
79+
logger : logger_t := i2c_target_vc_logger
80+
) return i2c_target_vc_t is
8181
variable buf : buffer_t;
8282
begin
8383
-- I2C can address 256 bytes, so construct an internal buffer to reflect that
@@ -91,24 +91,24 @@ package body i2c_peripheral_pkg is
9191
);
9292
end;
9393

94-
impure function address (i2c_periph: i2c_peripheral_t) return std_logic_vector is
94+
impure function address (i2c_periph: i2c_target_vc_t) return std_logic_vector is
9595
begin
9696
return i2c_periph.p_address;
9797
end function;
9898

99-
impure function buf (i2c_periph: i2c_peripheral_t) return buffer_t is
99+
impure function buf (i2c_periph: i2c_target_vc_t) return buffer_t is
100100
begin
101101
return i2c_periph.p_buffer;
102102
end function;
103103

104-
impure function memory (i2c_periph: i2c_peripheral_t) return memory_t is
104+
impure function memory (i2c_periph: i2c_target_vc_t) return memory_t is
105105
begin
106106
return i2c_periph.p_buffer.p_memory_ref;
107107
end function;
108108

109109
procedure expect_message (
110110
signal net : inout network_t;
111-
constant vc : i2c_peripheral_t;
111+
constant vc : i2c_target_vc_t;
112112
constant expected_msg : msg_type_t;
113113
) is
114114
variable msg : msg_t;
@@ -121,15 +121,15 @@ package body i2c_peripheral_pkg is
121121

122122
procedure expect_stop (
123123
signal net : inout network_t;
124-
constant vc : i2c_peripheral_t;
124+
constant vc : i2c_target_vc_t;
125125
) is
126126
begin
127127
expect_message(net, vc, got_stop);
128128
end procedure;
129129

130130
procedure start_byte_ack (
131131
signal net : inout network_t;
132-
constant vc : i2c_peripheral_t;
132+
constant vc : i2c_target_vc_t;
133133
variable ack : out boolean;
134134
) is
135135
variable msg : msg_t;
@@ -149,9 +149,9 @@ package body i2c_peripheral_pkg is
149149

150150
procedure check_written_byte (
151151
signal net : inout network_t;
152-
constant vc : i2c_peripheral_t;
152+
constant vc : i2c_target_vc_t;
153153
variable data : std_logic_vector;
154-
variable addr : unsigned;
154+
variable addr : std_logic_vector;
155155
) is
156156
variable msg : msg_t;
157157
begin

hdl/ip/vhd/i2c/BUCK hdl/ip/vhd/i2c/controller/BUCK

+11-10
Original file line numberDiff line numberDiff line change
@@ -1,21 +1,20 @@
11
load("//tools:hdl.bzl", "vhdl_unit", "vunit_sim")
2-
load("//tools:hdl.bzl", "vhdl_unit", "vunit_sim")
32
load("//tools:rdl.bzl", "rdl_file")
43

54
rdl_file(
6-
name = "i2c_core_regs_pkg",
7-
src = "i2c_core_regs.rdl",
8-
outputs = ["i2c_core_regs_pkg.vhd", "i2c_core_regs.html"],
5+
name = "i2c_ctrl_regs_pkg",
6+
src = "regs/i2c_ctrl_regs.rdl",
7+
outputs = ["i2c_ctrl_regs_pkg.vhd", "i2c_ctrl_regs.html"],
98
visibility = ['PUBLIC']
109
)
1110

1211
vhdl_unit(
13-
name = "i2c_txn_layer",
12+
name = "i2c_ctrl_txn_layer",
1413
srcs = glob([
1514
"link_layer/*.vhd",
16-
"txn_layer/*.vhd",
17-
"i2c_common_pkg.vhd"]),
15+
"txn_layer/*.vhd",]),
1816
deps = [
17+
"//hdl/ip/vhd/i2c/common:i2c_common_pkg",
1918
"//hdl/ip/vhd/common:countdown",
2019
"//hdl/ip/vhd/common:strobe",
2120
"//hdl/ip/vhd/common:streaming_if_pkg",
@@ -28,10 +27,12 @@ vhdl_unit(
2827
)
2928

3029
vunit_sim(
31-
name = "i2c_txn_layer_tb",
32-
srcs = glob(["sims/txn_layer/*.vhd", "sims/*.vhd"]),
30+
name = "i2c_ctrl_txn_layer_tb",
31+
srcs = glob(["txn_layer/sims/*.vhd"]),
3332
deps = [
34-
":i2c_txn_layer",
33+
":i2c_ctrl_txn_layer",
34+
"//hdl/ip/vhd/i2c/common:i2c_cmd_vc",
35+
"//hdl/ip/vhd/i2c/common:i2c_target_vc",
3536
"//hdl/ip/vhd/vunit_components:basic_stream"
3637
],
3738
visibility = ['PUBLIC'],

hdl/ip/vhd/i2c/i2c_core.vhd hdl/ip/vhd/i2c/controller/i2c_ctrl_top.vhd

+18-18
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ use work.tristate_if_pkg;
1111

1212
use work.i2c_common_pkg;
1313

14-
entity i2c_core is
14+
entity i2c_ctrl is
1515
generic (
1616
CLK_PER_NS : positive;
1717
MODE : mode_t;
@@ -28,25 +28,25 @@ entity i2c_core is
2828
);
2929
end entity;
3030

31-
architecture rtl of i2c_core is
31+
architecture rtl of i2c_ctrl is
3232

3333
begin
3434

35-
i2c_txn_layer_inst: entity work.i2c_txn_layer
36-
generic map(
37-
CLK_PER_NS => CLK_PER_NS,
38-
MODE => MODE
39-
)
40-
port map(
41-
clk => clk,
42-
reset => reset,
43-
scl_if => scl_if,
44-
sda_if => sda_if,
45-
cmd => cmd,
46-
cmd_valid => cmd_valid,
47-
core_ready => core_ready,
48-
tx_st_if => tx_st_if,
49-
rx_st_if => rx_st_if
50-
);
35+
i2c_ctrl_txn_layer_inst: entity work.i2c_ctrl_txn_layer
36+
generic map(
37+
CLK_PER_NS => CLK_PER_NS,
38+
MODE => MODE
39+
)
40+
port map(
41+
clk => clk,
42+
reset => reset,
43+
scl_if => scl_if,
44+
sda_if => sda_if,
45+
cmd => cmd,
46+
cmd_valid => cmd_valid,
47+
core_ready => core_ready,
48+
tx_st_if => tx_st_if,
49+
rx_st_if => rx_st_if
50+
);
5151

5252
end architecture;

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