GHDL doesn't strip asserts for synth

Author: nathanaelhuffman

hdl/ip/vhd/spi/axi_controller/spi_axi_pkg.vhd

@@ -70,7 +70,7 @@ package body spi_axi_pkg is
             when spi_opcode_bit_clr =>
                 return rdata and (not wdata);
             when others =>
-                assert false report "not a bit operation opcode" severity failure;
+                return rdata;
         end case;
 
     end function;

hdl/ip/vhd/spi/axi_controller/spi_axi_sms.vhd

@@ -215,8 +215,6 @@ begin
             v.state := OPCODE;
             v.opcode := (others => '0');
             v.req_addr := (others => '0');
-
-            -- TODO: any more clearing needed?
         end if;
 
         spi_rin <= v;
@@ -232,7 +230,7 @@ begin
     -- given it's a processor. The task could die etc.  This also means that we don't interlock with the spi
     -- state machine, we just complete the transactions requested and supply any necessary data. If the SPI
     -- sm is in the wrong state, we'll drop any response data on the floor but not block anything here.
-    axi_sm_logic: process(all)
+    axi_sm_logic: process(axi_r)
         variable v : axi_reg_t;
 
     begin