Cosmo Hotplug FPGA 1st pass implementation #290
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This current includes a provisional bump of the oss-cad-suite so that CI will run, but only for the VHDL-side of the world. Decisions to be made over in #291 since bumping the tool version globally isn't a slam dunk |
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#291 landed so this was rebased on that and now has no tool-chain impacts vs what is already in main |
Aaron-Hartwig
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Feb 18, 2025
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A fairly decent sized PR, this brings in most of the MVP functionality for the cosmo hotplug FPGA.
There were a couple of tweaks to some of the IP to support making this easier to generate/loop across, but since none of that stuff is used elsewhere really yet I think it's ok to combined here with this PR.
Additionally there were a few things that GHDL complained about so those got cleaned up here as well.
As an overview, this drops in 5 i2c mux endpoints on one i2c bus to the SP, 2 i2c pca I/O expanders to a 2nd i2c bus going to the SP5, and for-generates 10 copies of CEM logic, wiring between the i/o expanders and the CEM slots as required.
This closes #166 (at least with an implementation that we need to test once we have hw!)