Add trace generation as a debug option in the Makefile

README.md

@@ -103,6 +103,14 @@ The most common way of running programs is to create a standalone Proteus simula
 make -C sim CORE=riscv.CoreExtMem
 ```
 
+To create a trace file of the simulation, you need to pass the additional flags `EXTRA_CFLAGS=-DTRACE_DUMP_ENABLED`:
+
+```shell
+make -C sim CORE=riscv.CoreExtMem EXTRA_CFLAGS=-DTRACE_DUMP_ENABLED
+```
+
+Other debug options can also be enabled (search for `EXTRA_CFLAGS` in the Makefile for a full list).
+
 This creates an executable at `sim/build/sim` which can be called with a flat binary file as input:
 
 ```
@@ -117,7 +125,7 @@ riscv32-unknown-elf-objcopy -O binary program.elf program.bin
 
 ### Examining simulation output
 
-Running a simulation the above way creates a VCD file called `sim.vcd` in the directory the simulation is run from.
+Running a simulation with trace with the option `EXTRA_CFLAGS=-DTRACE_DUMP_ENABLED` creates a trace file called `sim.fst` in the directory the simulation is run from.
 
 We provide a bare-bones `sim.gtkw` GTKWave savefile to examine this VCD file.
 You might need to update the three hardcoded paths in `sim.gtkw` before using it.

sim/Makefile

@@ -9,13 +9,19 @@ VERILATOR_NAME = V$(TOPLEVEL_MODULE)
 EXE_NAME = sim
 EXE_FILE = $(BUILD_DIR)/$(EXE_NAME)
 
+CFLAGS = -O3 -std=c++20
+# Debug options
+#EXTRA_CFLAGS += -DLOG_STORES_ENABLED
+#EXTRA_CFLAGS += -DTRACE_DUMP_ENABLED
+CFLAGS += $(EXTRA_CFLAGS)
+
 all: $(EXE_FILE)
 
 $(EXE_FILE): $(BUILD_DIR)/$(VERILATOR_NAME).mk main.cpp
 	make -C $(BUILD_DIR) -f $(VERILATOR_NAME).mk $(EXE_NAME)
 
 $(BUILD_DIR)/$(VERILATOR_NAME).mk: $(VERILOG_INPUT)
-	verilator --cc --exe --trace-fst -O3 -CFLAGS "-O3 -std=c++20" -Wno-WIDTH -Wno-UNOPTFLAT -Wno-CMPCONST -Wno-UNSIGNED -Mdir $(BUILD_DIR) $(VERILOG_INPUT) main.cpp -o $(EXE_NAME)
+	verilator --cc --exe --trace-fst -O3 -CFLAGS "$(CFLAGS)" -Wno-WIDTH -Wno-UNOPTFLAT -Wno-CMPCONST -Wno-UNSIGNED -Mdir $(BUILD_DIR) $(VERILOG_INPUT) main.cpp -o $(EXE_NAME)
 
 $(VERILOG_INPUT): $(BASE_DIR)/$(VERILOG_FILE_NAME)
 	mkdir -p $(@D)

sim/main.cpp

@@ -25,8 +25,17 @@ const std::uint64_t MAX_CYCLES = 1000000000ULL;
 const unsigned int MEMBUS_WORDS = 4;
 const unsigned int MEMBUS_OFFSET = 2 + std::bit_width(MEMBUS_WORDS) - 1;
 
+#ifdef LOG_STORES_ENABLED
+const bool log_stores = true;
+#else
 const bool log_stores = false;
+#endif
+
+#ifdef TRACE_DUMP_ENABLED
+const bool trace_dump = true;
+#else
 const bool trace_dump = false;
+#endif
 
 class Memory
 {