hw: Fix schema and RTL to integrate wide multicast support

Author: Lore0599

Bender.local

@@ -0,0 +1,7 @@
+# Copyright 2023 ETH Zurich and University of Bologna.
+# Solderpad Hardware License, Version 0.51, see LICENSE for details.
+# SPDX-License-Identifier: SHL-0.51
+
+overrides:
+  axi: { git: "https://github.com/colluca/axi.git", rev: "multicast" }
+  

Bender.lock

@@ -7,10 +7,10 @@ packages:
     dependencies:
     - common_cells
   axi:
-    revision: 39f5f2d51c5e524f6fc5cf8b6e901f7dcc5622d7
-    version: 0.39.6
+    revision: bec548fa2a9b18cbd7531105bb1fdf481ea8ad49
+    version: null
     source:
-      Path: ../axi
+      Git: https://github.com/colluca/axi.git
     dependencies:
     - common_cells
     - common_verification
@@ -42,10 +42,10 @@ packages:
     - scm
     - tech_cells_generic
   common_cells:
-    revision: null
+    revision: 0fd2ba32926c0360534dc3d5795143cb259abb1c
     version: null
     source:
-      Path: ../common_cells
+      Git: https://github.com/pulp-platform/common_cells
     dependencies:
     - common_verification
     - tech_cells_generic
@@ -74,7 +74,7 @@ packages:
     revision: ff5d56fffb3767814db88d6bf8f381974ea33aa5
     version: 0.6.4
     source:
-      Path: ../iDMA
+      Git: https://github.com/pulp-platform/iDMA
     dependencies:
     - axi
     - axi_stream

Bender.yml

@@ -19,9 +19,9 @@ package:
     - Matheus Cavalcante <matheusd@iis.ee.ethz.ch>
 
 dependencies:
-  axi:                { git: https://github.com/pulp-platform/axi,                version:  0.39.6      }
+  axi:                { git: https://github.com/colluca/axi,                      rev:  multicast      }
   axi_riscv_atomics:  { git: https://github.com/pulp-platform/axi_riscv_atomics,  version:  0.6.0       }
-  common_cells:       { git: https://github.com/pulp-platform/common_cells,       version:  multicast-xbar }
+  common_cells:       { git: https://github.com/pulp-platform/common_cells,       rev:  multicast-xbar }
   FPnew:              { git: https://github.com/pulp-platform/cvfpu.git,          rev:      pulp-v0.1.3 }
   register_interface: { git: https://github.com/pulp-platform/register_interface, version:  0.4.2       }
   tech_cells_generic: { git: https://github.com/pulp-platform/tech_cells_generic, version:  0.2.13      }

hw/snitch_cluster/src/snitch_cluster.sv

@@ -669,7 +669,7 @@ module snitch_cluster
       .slv_ports_resp_o (wide_axi_mst_rsp),
       .mst_ports_req_o (wide_axi_slv_req),
       .mst_ports_resp_i (wide_axi_slv_rsp),
-      .addr_map_i (dma_xbar_rule),
+      .addr_map_i (enabled_dma_xbar_rule),
       .en_default_mst_port_i (DMAEnableDefaultMstPort),
       .default_mst_port_i ({DmaXbarCfg.NoSlvPorts{dma_xbar_default_port}})
     );
@@ -699,7 +699,7 @@ module snitch_cluster
       .slv_ports_resp_o (wide_axi_mst_rsp),
       .mst_ports_req_o (wide_axi_slv_req),
       .mst_ports_resp_i (wide_axi_slv_rsp),
-      .addr_map_i (dma_xbar_rule),
+      .addr_map_i (enabled_dma_xbar_rule),
       .en_default_mst_port_i (DMAEnableDefaultMstPort),
       .default_mst_port_i ('{default: dma_xbar_default_port.idx})
     );

hw/snitch_cluster/src/snitch_cluster_wrapper.sv.tpl

@@ -92,7 +92,7 @@ module ${cfg['cluster']['name']}_wrapper (
     .ICacheLineCount (${cfg['cluster']['name']}_pkg::ICacheLineCount),
     .ICacheWays (${cfg['cluster']['name']}_pkg::ICacheWays),
     .VMSupport (${int(cfg['cluster']['vm_support'])}),
-    .EnableDMAMulticast (${int(cfg['enable_multicast'])}),
+    .EnableDMAMulticast (${int(cfg['cluster']['enable_multicast'])}),
     .RVE (${core_isa('e')}),
     .RVF (${core_isa('f')}),
     .RVD (${core_isa('d')}),

util/clustergen/schema/snitch_cluster.schema.json

@@ -153,6 +153,11 @@
                     "description": "User width of the wide AXI plug into the cluster.",
                     "default": 1
                 },
+                "enable_multicast": {
+                    "type": "boolean",
+                    "description": "Whether to enable the mutlicast feature into the cluster",
+                    "default": false
+                },
                 "hart_base_id": {
                     "type": "number",
                     "description": "Base hart id of the cluster. All cores get the respective cluster id plus their cluster position as the final `hart_id`.",