Skip to content

Commit 7a2fee8

Browse files
Lore0599colluca
authored andcommitted
Fix elaboration DMA XBAR
1 parent f1029c9 commit 7a2fee8

File tree

1 file changed

+7
-5
lines changed

1 file changed

+7
-5
lines changed

hw/snitch_cluster/src/snitch_cluster.sv

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -613,9 +613,11 @@ module snitch_cluster
613613
.mst_resp_i (wide_axi_mst_rsp[SoCDMAIn])
614614
);
615615

616-
xbar_rule_t dma_xbar_default_port;
617-
assign dma_xbar_default_port = '{
618-
idx: SoCDMAOut,
616+
617+
int unsigned dma_xbar_default_port = SoCDMAOut;
618+
xbar_rule_t dma_xbar_default_port_rule;
619+
assign dma_xbar_default_port_rule = '{
620+
idx: dma_xbar_default_port,
619621
start_addr: tcdm_start_address,
620622
end_addr: zero_mem_end_address
621623
};
@@ -673,7 +675,7 @@ module snitch_cluster
673675
.mst_ports_resp_i (wide_axi_slv_rsp),
674676
.addr_map_i (enabled_dma_xbar_rule),
675677
.en_default_mst_port_i (DMAEnableDefaultMstPort),
676-
.default_mst_port_i ({DmaXbarCfg.NoSlvPorts{dma_xbar_default_port}})
678+
.default_mst_port_i ({DmaXbarCfg.NoSlvPorts{dma_xbar_default_port_rule}})
677679
);
678680
end else begin : gen_dma_xbar
679681
axi_xbar #(
@@ -703,7 +705,7 @@ module snitch_cluster
703705
.mst_ports_resp_i (wide_axi_slv_rsp),
704706
.addr_map_i (enabled_dma_xbar_rule),
705707
.en_default_mst_port_i (DMAEnableDefaultMstPort),
706-
.default_mst_port_i ('{default: dma_xbar_default_port.idx})
708+
.default_mst_port_i ({DmaXbarCfg.NoSlvPorts{dma_xbar_default_port}})
707709
);
708710
end
709711

0 commit comments

Comments
 (0)