@@ -67,7 +67,7 @@ enum snrt_ssr_dim {
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/**
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* @brief The SSR configuration registers.
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*/
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- enum snrt_ssr_reg {
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+ typedef enum snrt_ssr_reg {
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SNRT_SSR_REG_STATUS = 0 , /**< SSR status register */
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SNRT_SSR_REG_REPEAT = 1 , /**< SSR repeat register */
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SNRT_SSR_REG_BOUNDS = 2 , /**< SSR bounds register */
@@ -77,7 +77,7 @@ enum snrt_ssr_reg {
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SNRT_SSR_REG_RPTR_INDIR = 16 , /**< SSSR indir. indices read ptr register */
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SNRT_SSR_REG_RPTR = 24 , /**< SSR read pointer register */
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SNRT_SSR_REG_WPTR = 28 /**< SSR write pointer register */
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- };
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+ } snrt_ssr_reg_t ;
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/**
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* @brief The size of the SSSR indirection indices.
@@ -160,9 +160,9 @@ inline void write_ssr_cfg(enum snrt_ssr_reg reg, uint32_t dm, uint32_t value) {
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*/
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inline void snrt_ssr_loop_1d (enum snrt_ssr_dm dm , size_t b0 , size_t s0 ) {
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-- b0 ;
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 0 , dm , b0 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 0 ) , dm , b0 );
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size_t a = 0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 0 , dm , s0 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 0 ) , dm , s0 - a );
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a += s0 * b0 ;
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}
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@@ -178,12 +178,12 @@ inline void snrt_ssr_loop_2d(enum snrt_ssr_dm dm, size_t b0, size_t b1,
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size_t s0 , size_t s1 ) {
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-- b0 ;
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-- b1 ;
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 0 , dm , b0 );
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 1 , dm , b1 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 0 ) , dm , b0 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 1 ) , dm , b1 );
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size_t a = 0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 0 , dm , s0 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 0 ) , dm , s0 - a );
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a += s0 * b0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 1 , dm , s1 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 1 ) , dm , s1 - a );
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a += s1 * b1 ;
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}
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@@ -202,15 +202,15 @@ inline void snrt_ssr_loop_3d(enum snrt_ssr_dm dm, size_t b0, size_t b1,
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-- b0 ;
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-- b1 ;
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-- b2 ;
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 0 , dm , b0 );
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 1 , dm , b1 );
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 2 , dm , b2 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 0 ) , dm , b0 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 1 ) , dm , b1 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 2 ) , dm , b2 );
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size_t a = 0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 0 , dm , s0 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 0 ) , dm , s0 - a );
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a += s0 * b0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 1 , dm , s1 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 1 ) , dm , s1 - a );
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a += s1 * b1 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 2 , dm , s2 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 2 ) , dm , s2 - a );
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a += s2 * b2 ;
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}
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@@ -233,18 +233,18 @@ inline void snrt_ssr_loop_4d(enum snrt_ssr_dm dm, size_t b0, size_t b1,
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-- b1 ;
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-- b2 ;
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-- b3 ;
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 0 , dm , b0 );
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 1 , dm , b1 );
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 2 , dm , b2 );
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- write_ssr_cfg (SNRT_SSR_REG_BOUNDS + 3 , dm , b3 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 0 ) , dm , b0 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 1 ) , dm , b1 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 2 ) , dm , b2 );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_BOUNDS + 3 ) , dm , b3 );
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size_t a = 0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 0 , dm , s0 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 0 ) , dm , s0 - a );
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a += s0 * b0 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 1 , dm , s1 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 1 ) , dm , s1 - a );
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a += s1 * b1 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 2 , dm , s2 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 2 ) , dm , s2 - a );
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a += s2 * b2 ;
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- write_ssr_cfg (SNRT_SSR_REG_STRIDES + 3 , dm , s3 - a );
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+ write_ssr_cfg (( snrt_ssr_reg_t )( SNRT_SSR_REG_STRIDES + 3 ) , dm , s3 - a );
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a += s3 * b3 ;
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}
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@@ -265,7 +265,8 @@ inline void snrt_ssr_repeat(enum snrt_ssr_dm dm, size_t count) {
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*/
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inline void snrt_ssr_read (enum snrt_ssr_dm dm , enum snrt_ssr_dim dim ,
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volatile void * ptr ) {
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- write_ssr_cfg (SNRT_SSR_REG_RPTR + dim , dm , (uintptr_t )ptr );
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+ write_ssr_cfg ((snrt_ssr_reg_t )(SNRT_SSR_REG_RPTR + dim ), dm ,
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+ (uintptr_t )ptr );
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}
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/**
@@ -276,7 +277,8 @@ inline void snrt_ssr_read(enum snrt_ssr_dm dm, enum snrt_ssr_dim dim,
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*/
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inline void snrt_ssr_write (enum snrt_ssr_dm dm , enum snrt_ssr_dim dim ,
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volatile void * ptr ) {
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- write_ssr_cfg (SNRT_SSR_REG_WPTR + dim , dm , (uintptr_t )ptr );
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+ write_ssr_cfg ((snrt_ssr_reg_t )(SNRT_SSR_REG_WPTR + dim ), dm ,
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+ (uintptr_t )ptr );
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}
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/**
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