diff --git a/src/iommu_extensions.adoc b/src/iommu_extensions.adoc
index 388fb25..0ced2b9 100644
--- a/src/iommu_extensions.adoc
+++ b/src/iommu_extensions.adoc
@@ -108,9 +108,9 @@ allocation.
 The RISC-V IOMMU Version 1.0 specification provides commands to invalidate
 leaf page table entries from address translation caches when performing an
 address-specific invalidation operation. The non-leaf PTE invalidation
-extension provides commands to optionally invalidate non-leaf PTE entries
-from the address translation caches when performing an address-specific
-invalidation operation.
+extension provides commands to optionally also invalidate non-leaf PTE
+entries from the address translation caches when performing an
+address-specific invalidation operation.
 
 The non-leaf PTE invalidation extension is implemented if the `capabilities.NL`
 (bit 42) is 1. When the `capabilities.NL` bit is 1, a non-leaf (`NL`) field is