diff --git a/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/binary_op_template.py b/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/binary_op_template.py
index 2232609b6..fa2223ada 100644
--- a/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/binary_op_template.py
+++ b/rvv-intrinsic-generator/rvv_intrinsic_gen/templates/binary_op_template.py
@@ -61,6 +61,7 @@ def render(G, op_list, type_list, sew_list, lmul_list, decorator_list):
 
       type_helper = TypeHelper(**args)
 
+      s_op2 = None
       if (op in ["mulhsu", "ssra", "sra"] and data_type == "uint") or \
          (op in ["ssrl", "srl"] and data_type == "int"):
         # Unsigned mulhsu and ssra are unsupported, signed ssrl is unsupported