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Support bfloat16 in floating point test case header
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245 files changed

+937
-247
lines changed

‎auto-generated/bfloat16/llvm-api-tests/vcreate.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vfncvtbf16.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vfwcvtbf16.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vfwmaccbf16.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vget.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vle16.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vle16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vloxei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg2ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg3ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg4ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg5ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg6ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg7ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vloxseg8ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlse16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg2e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg2e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlseg3e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg3e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlseg4e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg4e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlseg5e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg5e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlseg6e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg6e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlseg7e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg7e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlseg8e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlseg8e16ff.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// REQUIRES: riscv-registered-target
22
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3-
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
46
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
57
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
68

‎auto-generated/bfloat16/llvm-api-tests/vlsseg2e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlsseg3e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlsseg4e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlsseg5e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlsseg6e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlsseg7e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vlsseg8e16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vluxei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vluxseg2ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

‎auto-generated/bfloat16/llvm-api-tests/vluxseg3ei16.c

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
// REQUIRES: riscv-registered-target
2-
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
2+
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
3+
// RUN: -target-feature +experimental-zvfh \
4+
// RUN: -target-feature +experimental-zvfbfmin \
5+
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
36
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
47
// RUN: FileCheck --check-prefix=CHECK-RV64 %s
58

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