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Support bfloat16 in floating point test case header
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@4vtomat
4vtomat committed Jun 4, 2024
1 parent 9d22b93 commit 53103d6
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Showing 245 changed files with 937 additions and 247 deletions.
5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vcreate.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vfncvtbf16.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vfwcvtbf16.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vfwmaccbf16.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vget.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vle16.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vle16ff.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg2ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg3ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg4ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg5ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg6ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg7ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vloxseg8ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlse16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg2e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg2e16ff.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg3e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg3e16ff.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg4e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg4e16ff.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg5e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg5e16ff.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg6e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg6e16ff.c
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@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg7e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg7e16ff.c
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Original file line number Diff line number Diff line change
@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg8e16.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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4 changes: 3 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlseg8e16ff.c
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Original file line number Diff line number Diff line change
@@ -1,6 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg2e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg3e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg4e16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg5e16.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg6e16.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg7e16.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vlsseg8e16.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vluxei16.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vluxseg2ei16.c
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// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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5 changes: 4 additions & 1 deletion auto-generated/bfloat16/llvm-api-tests/vluxseg3ei16.c
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@@ -1,5 +1,8 @@
// REQUIRES: riscv-registered-target
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
// RUN: -target-feature +experimental-zvfh \
// RUN: -target-feature +experimental-zvfbfmin \
// RUN: -target-feature +experimental-zvfbfwma -disable-O0-optnone \
// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
// RUN: FileCheck --check-prefix=CHECK-RV64 %s

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